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ultraembedded / biriscv

32-bit Superscalar RISC-V CPU
Apache License 2.0
838 stars 146 forks source link

DEBUG interface #5

Closed zhuzhizhan closed 4 years ago

zhuzhizhan commented 4 years ago

Hi,

Do you have plan to design the DEBUG interface?

ultraembedded commented 4 years ago

It is on my list of enhancements. Not hugely hard to do....

zhuzhizhan commented 4 years ago

It is easy to debug the core if the core have the debug interface. I'm evaluating this core and may run it on fpga debuging with openocd......