Mirror backplane power mapping

[yipengsun]

@bflaggs Zishuo has exported all netlists that are available. For mirror, you can start with BP -> custom telemetry breakout board only. For the rest, either the board is still in design, or we need to discuss how to reuse current board.

[bflaggs]

@yipengsun Here is the error I mentioned to you when attempting to use the default CurrentFlow() with the mirror backplane -> custom BB mapping.

vagrant@vagrant-arch: ben* > python -i ./MirrorBPMapping.py 
Traceback (most recent call last):
  File "./MirrorBPMapping.py", line 192, in <module>
    mirror_bp_descr = MirrorBPReader.read(NetHopper)
  File "./pyUTM/pyUTM/io.py", line 291, in read
    map(lambda x: x.strip('\"'), node[1:3]))
TypeError: 'CurrentFlow' object is not callable

I do not have much in my python script although I will upload it to the ben branch on this project for you to look at. I will not have much more time to work on it over this weekend although possibly tonight and Monday morning I will be able to work more.

[yipengsun]

The likely cause is that MirrorBPReader is an instance of PcadNaiveReader, and its read() method doesn't support any argument. The correct way to do this is to instantiate the MirrorBPReader as a PcadReader, NOT PcadNaiveReader.

[bflaggs]

The code is outputting correct results except for a few signals. All "..._2V5SENSE..." signals on the mirror backplane do not go to "GND" however in the output from the code they say they do. I have checked my matching and it seems correct so this is an unexpected problem.

It should be noted that all "..._2V5SENSE..." signals in the mirror backplane netlist file have an attribute in the net as follows (attr "ClassName" "NetTie" (textStyleRef "(Default)")) whereas this attribute does not exist for the same signals in the mirror custom telemetry breakout board netlist file.

Also there are some other signals from the mirror backplane netlist file that do not go to "GND" but the output from the net hopping says that they do go to "GND". It should be noted that most (I only checked some not all) of these nets in the mirror backplane netlist file have a component as follows RB_... or RBSP_.... @yipengsun says he believes he knows why this is occurring although he needs to check with Phoebe first.

[bflaggs]

Leaving out the components RB_\d, RBSP_\d and NT_\d in the definition of MirrorBPHopper yields correct output from mapping the signals of the Mirror Custom Telemetry BB to the Mirror Backplane.

The output CSV file is now saved in the directory output with the name MirrorBBBackplaneMapping.csv.

[yipengsun]

Thanks. I'm going to release the newly-generated file on github. Also, I plan to change the name of the repo, since now it's not just COMET-DCB.

No action needed on your side, even after the name change.

[yipengsun]

The RB and RBSP are marked as DO NOT INSTALL for alpha backplanes, so we should remove them on the net-hopping list (you did that for RBSP). I'm still unsure about NT components, as they literally represent copper.

The umd-lhcb/ut_tools#15 explains the RB, RBSP, and CxRB component installation rules.

[yipengsun]

I've merged your branch into master. Please recreate ben branch. I think the next step is find the mapping between the mirror backplane and the inner breakout board. I think you can talk to @manuelfs for more info today.

[bflaggs]

I have completed Inner BB -> Mirror BP mapping but have not checked the correctness of this mapping following Manuel's suggestion on Slack.

The issue arises because in order to accurately map out these connections I had to un-include the resistors and capacitors from the CurrentFlow() command. Hence, for the mirror backplane, my command was MirrorBPHopper = CurrentFlow([r"^RT\d"]) which means that only the thermistors were taken as copper. This means that I can not accurately map the Inner BB -> Mirror BP connections without assuming that the resistors and capacitors are NOT copper which to me does not make sense.

[yipengsun]

This is very very weird. What is the symptom if you do asumme resistors and capacitors are coppers?

[bflaggs]

If I do assume that the resistors and capacitors are copper then the script will still run although the output will be incorrect. It will state that the nets for the inner BB connect to GND on the mirror backplane which I checked manually to be incorrect.

[yipengsun]

You've checked the schematics, but maybe there's some hidden resistor that you overlooked so that these lines are actually connected to GND.

I think resistors should be treated as coppers. This inconsistency can be explained in two ways:

1. The net hopper has some bugs so the hopping is incorrect.
2. We didn't read the schematics properly.

Can you provide a detailed example on the inner BB connect to GND but mirror backplane schematics + inner BB schematics says otherwise? I'd like to take a look as well.

[bflaggs]

I think that it may be something wrong with the NetHopper because even if a resistor or capacitor is in the net then that net will be ignored and treated as copper even if there are OTHER connections within that net (which is why when I do include resistors and capacitors in the NetHopper the nets with capacitors and resistors are ignored).

Also I did not look directly at the schematics, I only looked at the .net files under the input directory.

One detailed example would be for the net labeled JD11_JPL2_1V5 for the Inner BB. This net connects to the node labeled "JPL2" "1". For the Mirror BP the net should be labeled as JD8_JPL2_1V5 and the code does output this when I do not include resistors and capacitors in the NetHopper. However, when I do include resistors and capacitors in the NetHopper then the Mirror BP net reads GND.

[yipengsun]

In input/inner_bb.net, we have:

  (net "JD11_JPL2_1V5_bis"
    (node "JD11 JPL2 1V5 BIS" "1")
    (node "JPL2" "2")
  )

In input/mirror_backplane.net, we have:

  (net "JD8_JPL2_1V5"
    (node "C113" "1")
    (node "C115" "1")
    (node "JD8" "a1")
    (node "JD8" "a2")
    (node "JD8" "a5")
    (node "JD8" "a6")
    (node "JD8" "a9")
    (node "JD8" "a10")
    (node "JD8" "a13")
    (node "JD8" "a14")
    (node "JD8" "a17")
    (node "JD8" "a18")
    (node "JD8" "a21")
    (node "JD8" "a22")
    (node "JD8" "a25")
    (node "JD8" "a26")
    (node "JD8" "a29")
    (node "JD8" "a30")
    (node "JD8" "a33")
    (node "JD8" "a34")
    (node "JD8" "a37")
    (node "JD8" "a38")
    (node "JD8" "a41")
    (node "JD8" "a42")
    (node "JD8" "a45")
    (node "JD8" "a46")
    (node "JD8" "a49")
    (node "JD8" "a50")
    (node "JPL2" "1")
    (node "JPL2" "2")
    (node "R27" "2")
    (node "R28" "2")
    (node "R34" "2")
    (node "RB_9" "2")
    (node "RB_11" "2")
    (node "RB_13" "2")
    (node "RB_15" "2")
    (node "RB_17" "2")
    (node "RB_19" "2")
    (node "RB_21" "2")
    (node "RB_23" "2")
    (node "RB_25" "2")
    (node "RB_27" "2")
    (node "RB_29" "2")
    (node "RB_31" "2")
    (node "RB_33" "2")
    (node "RB_35" "2")
    (node "RB_37" "2")
    (node "RB_39" "2")
    (node "RB_41" "2")
    (node "RB_43" "2")
    (node "RB_45" "2")
    (node "RB_47" "2")
    (node "RB_49" "2")
    (node "RB_51" "2")
    (node "RB_53" "2")
    (node "RB_55" "2")
    (node "RB_57" "2")
    (node "RB_59" "2")
    (node "RB_61" "2")
    (node "RB_63" "2")
  )

One of the capacitor is C113. The other leg of C113 is listed in the GND netlist (too long).

[yipengsun]

So maybe GND is correct if we assume both C and R are copper. I don't really know. @manuelfs any idea on this?

A "solution" would be: We consider R as copper, but not C. However I'm not sure if this is the correct approach.

[bflaggs]

Considering R as copper but not C will not solve the problem. I first tried this (considering R as copper but not C) before I removed both R and C from the NetHopper but I still did not find the correct mapping for the Inner BB -> Mirror BP.

I think that the issue arises because when I mark both R and C in the NetHopper as copper then any net lists with R or C components in them are ignored. Although it is possible that every R and C component for the net lists needed to be mapped from the Inner BB -> Mirror BP is also connected to GND in the Mirror BP .net file.

I plan on looking more into this discrepancy soon (hopefully Wednesday night).

[yipengsun]

I just realized that I misread your example. Here's updated list:

From input/inner_bb.net:

  (net "JD11_JPL2_1V5"
    (node "JD11 JPL2 1V5" "1")
    (node "JPL2" "1")
  )

From input/mirror_backplane.net (this is the same net):

  (net "JD8_JPL2_1V5"
    (node "C113" "1")
    (node "C115" "1")
    (node "JD8" "a1")
    ...
    (node "JPL2" "1")
    (node "JPL2" "2")
    ...

Still C113 is in this net, and it is connected to GND.

[bflaggs]

I have found what is causing the discrepancy in the output mapping CSV file when treating RXXX as copper. Including RXXX as copper lets CurrentFlow() map the nets accurately but it lists out the incorrect final net name for the mirror backplane. This is because treating the resistors RXXX as copper means that the signal will continue to be traced further in the .net file resulting in a correct net name but this is not the final net name that we want when tracing. The net name output to the CSV file when including RXXX as copper is a valid net name but not the actual final net name of the signal which is what we want.

This is also why the capacitor components CXXX needed to be removed from CurrentFlow(). The mapping would be correct but the final net name we want also is connected to a capacitor pad whose other pad was connected to GND.

The same is true for the resistors RXXX although the other pads of the resistors were not connected to GND but were connected to different net names.

For now I have only included the thermistors RTXX in the CurrentFlow() command for the mirror backplane as this outputs the CSV file that we want. I could not include the net ties NTXX_X and NTXX and a specific type of resistor, RBSP_XXX, in the CurrentFlow() command for the same reason I could not include the regular RXXX resistors. I could not include the resistors RB_XXX and RSP_XX in the CurrentFlow() command for the same reason I could not include the regular CXXX capacitors.

NOTE: This only needs to be done for the CurrentFlow() command for the mirror backplane as the inner BB follows the default CurrentFlow() (passing CurrentFlow() with no arguments given).

[bflaggs]

Per the instructions by Manuel on Slack I used my matching script to match the Inner BB to the True Backplane and the Inner BB to the True P2B2 in order to see if the results matched those I got when matching by hand. The results do match and I have pushed my Python codes that performed this matching onto this repo under branch ben. This gives me confidence that my matching script for the Inner BB to the Mirror Backplane is correct and that I will be able to correctly match the Inner BB to the Mirror P2B2 when that is available.

So far this matching has only been done for the Inner BB as I only had the net list for the Inner BB under the input directory in this repo. I believe making this matching available for the Outer BB will be straightforward although I do not currently have this net list.

[yipengsun]

Zishuo has uploaded the mirror P2B2 to this repo. Also, I implemented the functionality of finite hopping in net hopper. But I guess that is not needed?

[CoffeeIntoScience]

Is there an output for the mirror (preliminary?)

[yipengsun]

@bflaggs I just discovered that for inner BB, net hopping is not needed at all---with or without, they produce identical result.

[yipengsun]

@CoffeeIntoScience https://github.com/umd-lhcb/UT-Aux-mapping/releases/latest I released MirrorBP-InnerBB mapping. Thanks to @bflaggs, good work!