ut-robotics / picr22-team-kivipallur-jurto

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Connect high currents with wide copper and multiple vias #46

Closed ReikoR closed 1 year ago

ReikoR commented 1 year ago
  1. For example motor driver outputs: image image \ You need to use direct connection for polygons in the rules and change polygon pour order from Tools -> Polygon Pours -> Polygon Manager. \ I'm not sure if capacitor between driver outputs is of any use. It should be fine to remove it.

  2. Connect GND_M pads with multiple vias. image image

  3. Place capacitors below motor drivers and connect with vias. Use wide polygons on bottom layer to connect capacitors together. Something roughly like this: image image image \ Improving motor driver placement would probably help to simplify layout a bit.

  4. Select Pour Over All Same Net Objects and Remove Dead Copper in Polygon Pour properties. image image

ReikoR commented 1 year ago
  1. There is no need for so many ground vias. image

  2. What is the reason/purpose of overlapping the polygons one top and bottom layers? I moved them for the picture. image

  3. Capacitors are connected to motor driver with only one via. image

  4. More vias should be connected to motor driver ground pad. image

  5. It's better to connect motor outputs with polygons. image

  6. It's better to connect thrower VCC pad with wide polygon. image

ReikoR commented 1 year ago
  1. VCC is connected with only one via. More vias should be used for high currents. \ Current layout: image \ Reverse voltage protection MOSFET could be placed on the bottom layer, connected with multiple vias to battery plus pad. Thrower plus (VCC) pad could also be connected with multiple vias. image

  2. One of the vias is cutting into motor driver output polygon. image

  3. One motor driver VM pad has 4 vias connected, others have only 2. \ Current layout: image \ Proposed layout: image

  4. Smaller capacitors should be placed closest to the supply pads. 0.1uF capacitors should be the closest to motor driver VM pads. \ Current layout: image \ Proposed layout: image

  5. Routing on bottom layer should be improved to avoid creating large gaps in VCC polygon. Current has to flow around those gaps. \ Current layout (current flow marked with yellow line): image \ Routing mostly on top layer and moving bottom layer tracks closer to isolators should help: image image

ReikoR commented 1 year ago

One of the capacitors (C17) is cutting into motor output polygon: image