uwsampl / lakeroad-evaluation

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Adding Porting Experiments Baseline #144

Open vcanumalla opened 3 months ago

vcanumalla commented 3 months ago

We need to have experiments that test the quality of "automatic" porting of tools. In other words, we want to show that Lakeroad/Verin would be capable of porting from one type of dsp to another better than SOTA.

In this case SOTA is the process of inlining a DSP's simulation model and passing it back into a compiler in hopes of inferring the new target DSP. We can roughly emulate the process as such

  1. Get a DSP instantiation of a design fragment from a SOTA tool (i.e. the output of smth like Lakeroad, Vivado, etc.)
  2. Inline the simulation model of the DSP to be used in place of the original instantiation.
  3. Run the same SOTA tool on step 2's output, and infer a new DSP.
  4. If an output could be found AND a single DSP was used, this is "correct" porting. Otherwise, this is a failure.