vaughnbetz
commented
1 year ago Threshold voltage increases as temperature drops while mobility increases. Hence there are two competing factors and the worst case performance can occur at low temperatures, particularly for pass gate logic in advanced technologies.Coffe has no lower temp limit so long as your spice decks are accurate at that T. Transmission gate logic and gate boosting will help at low T.VaughnOn Mar 27, 2023, at 11:10 PM, luck-codeer @.***> wrote: Hi, I am using your tool COFFE2 to do experiments on the performance (delay and power consumption) of FPGA components at low temperature. The results obtained are shown in the figure below. It can be seen that below -100 ℃, the delay will increase as the temperature decreases.
However, according to this paper: "CryoWire: wire-driven microarchitecture designs for cryogenic computing." (https://dl.acm.org/doi/abs/10.1145/3503222.3507749), as the temperature decreases, the delay will also decrease, which is inconsistent with the experimental results. So, I would like to ask you two questions. One is what is the minimum temperature supported by COFFE2, and the other is if I want to obtain a delay for components such as SB MUX at - 200 ℃. Do you have any suggestions.
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luck-codeer
Hi, I am using your tool COFFE2 to do experiments on the performance (delay and power consumption) of FPGA components at low temperature. The results obtained are shown in the figure below. It can be seen that below -100 ℃, the delay will increase as the temperature decreases.
However, according to this paper: "CryoWire: wire-driven microarchitecture designs for cryogenic computing." (https://dl.acm.org/doi/abs/10.1145/3503222.3507749), as the temperature decreases, the delay will also decrease, which is inconsistent with the experimental results.
So, I would like to ask you two questions. One is what is the minimum temperature supported by COFFE2, and the other is if I want to obtain a delay for components such as SB MUX at - 200 ℃. Do you have any suggestions.