verilator / verilator-announce

Announcements related to Verilator
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Verilator Statistics-printing Survey #67

Closed wsnyder closed 6 months ago

wsnyder commented 6 months ago

Verilator is considering printed statistics to stdout. Please consider taking a brief survey on this topic. This survey will close February 29th.

Verilator Statistics-printing Survey

wsnyder commented 6 months ago

Thanks for all that participated. After filtering out spam, here's the results:

Q1: Do you use --main and/or --binary when creating a model (ignore times when using --lint-only). You may select more than one.

Q2: Should Verilator, when Verilating (--lint-only inclusive), print statistics to standard output, e.g. print a single-line summary of compile time, number of modules, memory usage, etc? (Currently, like GCC, Verilator doesn't print this information. It has --stats but that writes to a separate output file.)

Q3: Should Verilated models, when using --main/--build and so creating a main(), when the simulation finishes, print statistics to standard output. E.g. print a single line summary of simulation end time, wall time, memory usage, etc? (Currently Verilated models do not print this information.)

Some notable open responses:

Some people commented on progress on UVM and other bugs. As always, progress depends on people contributing code ;)

I plan on accepting the majority, which want the summaries, and also will (eventually) implement most of the ideas expressed.

If you have other critical comments please post to verilator/verilator#4909; I'm closing this verilator-annouce issue to reduce mass mail.