wrong LATCH warning

[jotego]

Using Verilator 5.024 2024-04-05 rev v5.024

I get a latch warning for this code:

  always @*
    case (n1572_o)
      6'b100000: n1574_o = n1569_o;
      6'b010000: n1574_o = intl;
      6'b001000: n1574_o = adds;
      6'b000100: n1574_o = n1551_o;
      6'b000010: n1574_o = n1548_o;
      6'b000001: n1574_o = n1545_o;
      default: n1574_o = result;
    endcase

I would have expected the default statement to prevent the latch warning. Slightly older versions of verilator will not mark this as a latch.

The full file itself is here. Running verilator --lint-only on it will produce the warning:

$ verilator --lint-only HUC6280.v
%Warning-LATCH: HUC6280.v:1074:3: Latch inferred for signal 'HUC6280.core.alu.n1574_o' (not all control paths of combinational always assign a value)
                                : ... Suggest use of always_latch for intentional latches
 1074 |   always @*
      |   ^~~~~~
                ... For warning description see https://verilator.org/warn/LATCH?v=5.024
                ... Use "/* verilator lint_off LATCH */" and lint_on around source to disable this message.
%Error: Exiting due to 1 warning(s)

I think this warning is wrong.

[RootCubed]

The warning appears after 5e1fc6e24d9c2706d9871de9bec25cebf2a95ac7, but the warning looks correct to me - looking at the full file, you have assign result = n1574_o; further up, so in the case statement default: n1574_o = result; is equivalent to default: n1574_o = n1574_o;. Seems like that commit fixed a bug rather than caused one.

[jotego]

Thank you very much @RootCubed :-)