can't pack adder

[narutozxp]

we hope to implement adder using the hard adder instead of luts, however , the packer rise an error.

Expected Behaviour

our adder should be packed without any error

Current Behaviour

the error is as follows:

Type: Packing
File: /home/data/shawn/eFPGA/Code/OpenFPGA/OpenFPGA/vtr-verilog-to-routing/vpr/src/pack/cluster_util.cpp
Line: 2161
Message: Can not find any logic block that can implement molecule.
    Pattern chain $abc$181$new_n17

our blif file is as follows:

# Generated by Yosys 0.22 (git sha1 f109fa3d4, gcc 11.3.0-1ubuntu1~22.04 -fPIC -Os)

.model adder_bench
.inputs ina[0] ina[1] ina[2] ina[3] ina[4] inb[0] inb[1] inb[2] inb[3] inb[4]
.outputs outc[0] outc[1] outc[2] outc[3] outc[4] outc[5]
.names $false
.names $true
1
.names $undef
.subckt adder a=ina[1] b=inb[1] cin=$abc$181$new_n17_ cout=$abc$181$new_n22_ sumout=outc[1]
.subckt adder a=ina[2] b=inb[2] cin=$abc$181$new_n22_ cout=$abc$181$new_n27_ sumout=outc[2]
.subckt adder a=ina[3] b=inb[3] cin=$abc$181$new_n27_ cout=$abc$181$new_n32_ sumout=outc[3]
.subckt adder a=ina[4] b=inb[4] cin=$abc$181$new_n32_ cout=outc[5] sumout=outc[4]
.subckt adder a=ina[0] b=inb[0] cin=$false cout=$abc$181$new_n17_ sumout=outc[0]
.end

Your Environment

• VTR revision used:8.1.0-dev+4834fd012
• Compiler version:GNU 11.3.0 on Linux-5.15.0-25-generic x86_64

[vaughnbetz]

Did you create the appropriate connections in the architecture and a pack pattern? Also, you will need to include your architecture file and command line in order for someone to reproduce the error.