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verilog-to-routing / vtr-verilog-to-routing

Verilog to Routing -- Open Source CAD Flow for FPGA Research
https://verilogtorouting.org
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[vqm2blif][Warnings] Removed std::regex and strncpy Warnings #2537

Closed AlexandreSinger closed 2 months ago

AlexandreSinger commented 2 months ago

Cleaned up a few warnings that were simply resolved.

See issue #2518

This also resolves one of the warnings in issue #2294

AlexandreSinger commented 2 months ago

@vaughnbetz I have verified that this resolved the issues. Please review when you have a moment.

vaughnbetz commented 2 months ago

Thanks Alex!