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verilog-to-routing / vtr-verilog-to-routing

Verilog to Routing -- Open Source CAD Flow for FPGA Research
https://verilogtorouting.org
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Overuse report with flat routing #2556

Open duck2 opened 1 month ago

duck2 commented 1 month ago

When trying to print out a large overuse report (at an early iteration) we hit the assert at overuse_report.cpp:474 .

To reproduce, run directrf with --max_router_iterations 10 --generate_rr_node_overuse_report on

(tested with directrf and bitcoin_miner, with decomposing parallel router)