yosys_update -> v0.38

[amirarjmand93]

Description

This update brings Yosys to version 0.38, which includes several bug fixes, performance improvements, and new features that enhance the synthesis capabilities of our flow. Notable additions in this version include : -New commands and options

For a detailed list of changes and improvements in Yosys v0.38 (Feb 9, 2024), please refer to the release notes.

Related Issue

-Update Yosys [The current version in the VTR flow is 0.32]

Types of changes

• [ ] New feature (change which adds functionality)
• [ ] I have added tests to cover my changes
• [ ] All new and existing tests passed

[vaughnbetz]

Thanks @amirarjmand93 . I checked one of the CI failures and it is OK (it's a logic reduction on a small design): https://github.com/verilog-to-routing/vtr-verilog-to-routing/actions/runs/9510083459/job/26214028541?pr=2616

Hopefully the rest are like that and can be handled by updating some golden results.

[amirarjmand93]

Result Overall, in comparison to Yosys v0.42, we have less violent failure in the QoR test in Yosys v0.38. But outdated f4pga still remains as the main external problem.

Primary Errors:

Conflict from f4pga to yosys v0.38 .

• f4pga looking for 'process_format_str' in Yosys . like 'multirange_dimensions' in Yosys v0.42, this item also has been changed in recent versions. (funcrion name/functionality/output have been changed in new simplify.cc)

File path(after making): vtr-verilog-to-routing/libs/EXTERNAL/yosys-f4pga-plugins/systemverilog-plugin/third_party/yosys/simplify.cc

Command: make -k CMAKE_PARAMS=-DYOSYS_F4PGA_PLUGINS=ON -j16

Logs: root/vtr-verilog-to-routing/vtr-verilog-to-routing/libs/EXTERNAL/yosys-f4pga-plugins/systemverilog-plugin/third_party/yosys/simplify.cc: In function 'bool systemverilog_plugin::simplify(Yosys::AST::AstNode*, bool, bool, bool, int, int, bool, bool)': 2024-06-14T03:33:58.3180898Z 03:33:58 | /root/vtr-verilog-to-routing/vtr-verilog-to-routing/libs/EXTERNAL/yosys-f4pga-plugins/systemverilog-plugin/third_party/yosys/simplify.cc:728:32: error: 'struct Yosys::AST::AstNode' has no member named 'process_format_str'; did you mean 'processFormat'?

Related issue: Yosys Update -> v0.42 SystemVerilog support for Yosys -> CI failed

I think we should turn the f4pga off in the CI test till that regains compatibility with Yosys.