verilog-to-routing / vtr-verilog-to-routing

Verilog to Routing -- Open Source CAD Flow for FPGA Research
https://verilogtorouting.org
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Specify a single location or a specific region for a custom switch block #2664

Closed saaramahmoudi closed 1 month ago

saaramahmoudi commented 3 months ago

This PR generalize the custom switch block description to allow the user to specify a exact (x,y) location for the switch block by setting type="XY_SPECIFIED", the exact syntax is explained below:

How Has This Been Tested?

The x and y attribute is tested by @petergrossmann21, and the region description is tested by myself.

Types of changes

Checklist:

I will add a new test and update documentation later today, but I have created the PR to start the review process.

vaughnbetz commented 3 months ago

Thanks @saaramahmoudi . I'll review shortly. Can you also please update the documentation and add it to this PR?

saaramahmoudi commented 3 months ago

Thanks @saaramahmoudi . I'll review shortly. Can you also please update the documentation and add it to this PR?

Yes, I will update both documentation and a new CI test for this PR later today.

petergrossmann21 commented 2 months ago

@saaramahmoudi I don't see any new files related to testing; is there something that still needs to be added?

saaramahmoudi commented 2 months ago

@petergrossmann21 @vaughnbetz I am so sorry, but I have been busy doing a different task at work. I am trying my best to land this PR as soon as possible. It might take two-three weeks.

vaughnbetz commented 1 month ago

@saaramahmoudi : I think this is ready to merge, but I just merged a libcatch2 update that caused a conflict (sorry!). If you fix that conflict I think this is good to go.

saaramahmoudi commented 1 month ago

@vaughnbetz Here is the link to Titan_quick_qor benchmarks: Titan

vaughnbetz commented 1 month ago

QoR looks good, thanks.

saaramahmoudi commented 1 month ago

@vaughnbetz This branch is also ready to merge

vaughnbetz commented 1 month ago

Thanks @saaramahmoudi !