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verilog-to-routing / vtr-verilog-to-routing

Verilog to Routing -- Open Source CAD Flow for FPGA Research
https://verilogtorouting.org
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Import MuraxSoC as a VtR benchmark #584

Open mithro opened 5 years ago

mithro commented 5 years ago

The SymbiFlow project is using MuraxSoC. This is the VexRISC-V configured as a "Cortex M0" style 32bit RISC-V processor + supporting infrastructure (XIP SPI controller, UART, etc).

The SymbiFlow Architecture Definitions repository is already running PicoSoC through VtR with our own architecture files both for Xilinx Series 7 and Lattice iCE40. You can find a copy of the exact things we are testing here.

It would be good if this benchmark was included in the normal VtR benchmarks.

mithro commented 5 years ago

FYI - @acomodi - Do you want to take this on, or is it better for @vaughnbetz to get one of his students to look at this?

mithro commented 5 years ago

One potential issue is that most benchmarks in VtR are using ODIN-II, while SymbiFlow uses Yosys.

vaughnbetz commented 5 years ago

Adding @suyang5 to this discussion too. My comments are the same as on the earlier benchmark.