Can a lisp expression in an AUTO block use a parameter from a package?

[sjalloq]

I may well be trying to be too clever here but I wanted to perform a lisp expansion in a port connection along the lines of:

/* module AUTO_TEMPLATE (
 .signal_@ (some_bus[@"(+ \1 OffsetParameterInPackageFile)"]),
);
*/

I've got verilog-library-directories set and I tried verilog-auto-read-includes:t but I get an error that the Symbol's value is void. Does this only work with `include files and defines?

[wsnyder]

You need to prepend "vh-" to get parameter values. See e.g. https://github.com/veripool/verilog-mode/blob/master/tests_ok/autoinst_param_value.v

[wsnyder]

P.S. Feel free to reopen or post followups if I misunderstood your issue!

[sjalloq]

Still doesn't work - I think I'm missing something basic. Here's an example. I've tried to make it easier by having the parameter in the same module for now but I get a different error.

1. If I define the parameter in module test below, I get the error, "Wrong type argument: number-or-marker-p, "7"".
2. If I import the package only, I get, "Symbol's value as variable is void: vh-MyParam".

module sub(/*AUTOARG*/);
  output logic signal_1;
endmodule

module test
  import test_pkg::*;
  (/*AUTOARG*/);

  parameter MyParam = 7;

  /*AUTOOUTPUT*/

  /* sub AUTO_TEMPLATE (
   .signal_@ (signal[@"(+ 1 vh-MyParam)"]),
   );
   */
  sub u_sub (/*AUTOINST*/);

endmodule

// Local Variables:
// verilog-library-extensions:(".v" ".sv")
// verilog-auto-read-includes:t
// verilog-library-directories:(".")
// End:

[sjalloq]

Ah, issue 1 above is solved by using @"(+ 1 (string-to-number vh-MyParam))" but I haven't seen any examples using string to number conversion...

[wsnyder]

Correct. If you were writing lisp you'd then after adding need a number-to-string, but verilog-mode templates do that for you when it sees a number.

The vh-* values are file local variables in the appropriate file. So if you need the value from "foo.vh" you need to do (untested):

  (save-excursion (set-buffer "foo.vh") vh-MyParam))

Said another way, vh- doesn't do any imports nor understand what is really a package.

[sjalloq]

On the other issue, I just found that I can do // eval:(verilog-read-defines "test_pkg.sv") but that only works if my parameter is not declared as an int.

So parameter int MyParam = 10 doesn't work but parameter MyParam = 10 does.

Edit: I also just tried your example of save-excursion but I'm using batch mode so that doesn't work. The verilog-read-defines option is fine for now if I modify my packages but is that a simple fix?

[wsnyder]

Looks like read-defines was never improved to handle SystemVerilog parameters with types. I pushed a fix for this to the verilog-mode here, please give it a try, thanks.

[sjalloq]

Just got round to testing this and all is well. Although I did find that I wasn't using the verilog-mode I thought I was using. :-/ #imgladyourewritinglispandnotme