Verilog-A `analog` block support

[danmcmahill]

Adds support for analog blocks in Verilog-A.

before:

module mymodule();
   analog begin
      // contents of the module goes here
   end // UNMATCHED !!
endmodule // mymodule

after:

module mymodule();
   analog begin
      // contents of the module goes here
   end // analog
endmodule // mymodule

[wsnyder]

I'm good to merge this when you feel it's stable for a bit, let me know when you think you are happy with it, thanks for improving this.

[danmcmahill]

I good with it.