Closed juanyo810 closed 2 years ago
Sorry, correct code snippet below with the same issue:
/* ReverseBits AUTO_TEMPLATE (
.DATA_SIZE(32),
.data_in (data_in[]),
.data_out (data_revbit_mode64[]),
);
*/
ReverseBits #(/*AUTOINSTPARAM*/
// Parameters
.DATA_SIZE (32)) // Templated
reverseBitMode64 (/*AUTOINST*/
// Outputs
.data_out (data_revbit_mode64[31:0]), // Templated
// Inputs
.data_in (data_in[31:0])); // Templated
// =-=-=-=-=-=-=-=-=-=-=- Reverse Byte 16-bit halfwords (REV16) - BOTH MODES =-=-=-=-=-=-=-=-=-
/* ReverseBytes AUTO_TEMPLATE (
.DATA_SIZE(80),
.data_in (data_in[]),
.data_out (data_revbit_mode64[]),
);
*/
ReverseBytes #(/*AUTOINSTPARAM*/)
reverseBitModeTest (/*AUTOINST*/
// Outputs
.data_out (data_revbit_mode64[63:0]), // Templated
// Inputs
.data_in (data_in[63:0]), // Templated
.sf_mode (sf_mode));
Apologies, dumb mistake on my end. Closing the issue.
Hi Wilson,
I am using verilog AUTOs at my current job and I am having some issues with AUTOINSTPARAM not printing the module's parameters for some modules, and for others, it does print the parameters. It is very strange. Something like this:
Every time I run AUTOs, the module ReverseBits is correctly expanded, but ReverseBytes is not. The files are almost identical, the only difference is the extra parameter. I tried removing one of the parameters, and the issue persists. I also added another parameter to "ReverseBits" and it expands it with no problem. Do you have any idea what may be causing this strnage problem?
Thanks for taking a look!