The regular expression .\(.*\) will result in an error if used alone.

[1371906755]

for example:

/*test AUTO_TEMPLATE(
.\(\.*\)  (a_\1[]),
);*/
test u_test(
/*AUTOINST*/);

[wsnyder]

You have too many backslashes there. You want:

  /* test AUTO_TEMPLATE (
    .\(.*\)     (\1[]),
    ); */

Full example here: https://github.com/veripool/verilog-mode/blob/master/tests/autoinst_dedefine.v

[1371906755]

verilog_mode have a error

[wsnyder]

Please attach a complete example as text (not screen shot) and say what the error is.

[1371906755]

module example
#(
parameter ID_WIDTH     = 6
) 
(/*AUTOINPUT*/ 
/*AUTOOUTPUT*/ 
); 

/*test AUTO_TEMPLATE(
.clk            (clk),
.reset_n        (reset_n),
.\\(.\*\\)         (alloc_\1[]),
);*/

test #(
/*AUTOINSTPARAM*/)u_test(
/*AUTOINST*/);

endmodule

module test
#(
parameter ID_WIDTH     = 6
) 
(
output[ID_WIDTH    -1:0] data_id,
input                   clk,             
input                   reset_n   
);
endmodule

[1371906755]

This example will result in an error

[wsnyder]

See my example in the answer above. You have too many backslashes.