Question: recognizing istances with speedbar - Githubissues

veripool / verilog-perl

Verilog parser, preprocessor, and related tools for the Verilog-Perl package

https://www.veripool.org/verilog-perl

Artistic License 2.0

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Closed veripoolbot closed 6 years ago

veripoolbot commented 6 years ago

Author Name: antonio bergnoli Original Redmine Message: 2524 from https://www.veripool.org

It woulld be nice if one can navigate a project tree finding istances easily as vhdl-mode does. Does anybody know if this is already possible?

veripoolbot commented 6 years ago

Original Redmine Comment Author Name: Wilson Snyder (@wsnyder) Original Date: 2018-03-20T13:15:43Z

The closest equivalent is verilog-goto-defun which will go to the submodule currently pointed at.

If you set verilog-highlight-modules t

and verilog-highlight-includes t

a mouse clock on a submodule or include will likewise jump.

There's nothing more at present, but contributions are welcome.