veripool / verilog-perl

Verilog parser, preprocessor, and related tools for the Verilog-Perl package
https://www.veripool.org/verilog-perl
Artistic License 2.0
121 stars 34 forks source link

Constants split across lines #1340

Closed veripoolbot closed 6 years ago

veripoolbot commented 6 years ago

Author Name: George Cuan Original Redmine Issue: 1340 from https://www.veripool.org

Original Assignee: Wilson Snyder (@wsnyder)


vhier is unable to parse RTL that contains constants that are split across lines. We see this in obfuscated code from 3rd party IP providers and we'd rather not edit the source RTL.

Example:

module splitconst #(
  parameter B=
               8
               'b
               1
               )(
               input logic [7:0]  a,
               output logic [7:0] y
               );

  assign y = a + B;

endmodule // splitconst

The output from vhier +libext+.sv splitconst.sv

%Error: splitconst.sv:6: syntax error, unexpected INTEGER NUMBER, expecting ')' or ','
%Error: splitconst.sv:9: syntax error, unexpected output, expecting IDENTIFIER or '=' or do or final
%Error: splitconst.sv:10: syntax error, unexpected ')', expecting ',' or ';'
Exiting due to errors

It compiles through vcs just fine.

Could you help? Thanks!

veripoolbot commented 6 years ago

Original Redmine Comment Author Name: Wilson Snyder (@wsnyder) Original Date: 2018-09-10T21:51:35Z


Simple enough to fix; fixed in git towards 3.455.

Thanks for the good test case.

veripoolbot commented 6 years ago

Original Redmine Comment Author Name: George Cuan Original Date: 2018-09-11T03:51:58Z


Thanks for the amazingly quick response!

How do we get the release? My colleague didn't find a version 3.455 in git.

Thanks

veripoolbot commented 6 years ago

Original Redmine Comment Author Name: Wilson Snyder (@wsnyder) Original Date: 2018-09-11T10:31:32Z


It's at the head of the git tree.

veripoolbot commented 6 years ago

Original Redmine Comment Author Name: George Cuan Original Date: 2018-09-12T04:45:36Z


Thank you! It worked.

veripoolbot commented 6 years ago

Original Redmine Comment Author Name: Wilson Snyder (@wsnyder) Original Date: 2018-09-16T21:28:37Z


In 4.002.