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veripool / verilog-perl

Verilog parser, preprocessor, and related tools for the Verilog-Perl package
https://www.veripool.org/verilog-perl
Artistic License 2.0
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Access package import declaration(s) after file parsing #1676

Open fischphob opened 2 years ago

fischphob commented 2 years ago

Hi there,

we have a script based on Verilog::Netlist to parse existing SystemVerilog files and generate a black box (bbox) version of them. We can access the parameter and port lists to write them to the bbox file. No problems with that.

But, we often use the package import declaration in the header syntax, for example:

module test
  import test_pkg::*;   // g_dw definition
  #(parameter integer c_param = 'd7)
  (input [g_dw-1:0] data_in);
endmodule

I call the Verilog::Netlist read_file sub two times: first with the package file and second with the module file. No parsing problems so far.

But, how can I get a list with imported packages, so that I can write it to the bbox variant too?

wsnyder commented 2 years ago

Verilog::SigParser calls the import() callback on these, but presently Verilog::Netlist does not use that callback to remember the packages.

If you would like to submit a pull request to record this information, I'd welcome including it. It is unlikely it will get added otherwise, sorry.