fixed point type

[saturn77]

This is a language feature request related to fixed point operations.

The overall request is to have an fixed point library supporting basic functions - like mult, add_equal (same IQ), and add_unequal (different IQ).

Generally, fixed point is useful for math, DSP, and control systems - so having integral fixed point support in Veryl would be amazing. I would say that this would be similar to VHDL fixed_point library, which is very useful.

So to add to the conversation about hierarchy and includes and module organization, I would like to see a dedicated fixed point library included with something like

mod fixed_point_pkg; 
use fixed_point_pkg::**; 

This is in contrast to doing something more true SystemVerilog like

`include fixed_point_pkg.sv
import fixed_point_pkg::*; 

But most of all I would like to see something like

mod fixed_point;
use fixed_point::{FixT, add_unequal, mult}

logic_fixed_pt<8:-8> a;
logic_fixed_pt<12:-12> b;
logic_fixed_pt<FixT> c;
logic_fixed_pt<FixT> d;

#[derive(fix_result_type)]
always_ff@(posedge CLK) begin 
c <= fixed_point::add_unequal(a + b); 
d <= fixed_point::mult(a * b); 
end 

The result type of "c" should be <12:-12> and the result type of "d" should be <20:-20> and the Veryl compiler should check this or make sure that it happens ... or something like that. Just a general thought / approach to fixed point library.