Update 'if-else' in b:match_words

vhda / verilog_systemverilog.vim

Verilog/SystemVerilog Syntax and Omni-completion

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Closed henry-hsieh closed 6 years ago

henry-hsieh commented 6 years ago

This PR replace #123 as a rebased branch instead.

vhda commented 6 years ago

None of the issues raised in https://github.com/vhda/verilog_systemverilog.vim/pull/123/files#r83697795 were addressed. In fact, as far as I can tell nothing changed since #123.

henry-hsieh commented 6 years ago

OK. I'll closed it. Thanks.