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vhda / verilog_systemverilog.vim

Verilog/SystemVerilog Syntax and Omni-completion
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"join" will break line intent #158

Closed gogulfresh closed 6 years ago

gogulfresh commented 6 years ago

Hi! If I put "join" inside question marks (for printing) will break line intent:

task testtask();

    logic myvar;
    logic myvar2;
    logic myvar3;

    fork
        p1: begin 
            myvar=1'b1;
            `info("some message with the word join");
        end
        p2: begin
            myvar2=1'b1;
        end
    join

myvar3 = 1'b1;
endtask

without join in the info message:

task testtask();

    logic myvar;
    logic myvar2;
    logic myvar3;

    fork
        p1: begin 
            myvar=1'b1;
            `info("some message with the word");
        end
        p2: begin
            myvar2=1'b1;
        end
    join

    myvar3 = 1'b1;
endtask
vhda commented 6 years ago

Please confirm if this fixed your issue.