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viktor-nikolov / MicroBlaze-DDR3-tutorial

Tutorial of a HW design of MicroBlaze using DDR3 RAM on Arty A7 board; DDR3 RAM speed test application
BSD 2-Clause "Simplified" License
30 stars 7 forks source link

Porting to other MicroBlaze #4

Open newfrogg opened 2 months ago

newfrogg commented 2 months ago

Hi Viktor, did you porting this block design on MicroBlaze V ? I'm very curious about this.

viktor-nikolov commented 2 months ago

Hi! No, I haven't tested this design with MicroBlaze V. At the moment, I see no benefit from using MicroBlaze V in my projects. 😃 I believe that in terms of using DDR SDRAM, the MicroBlaze Classic and MicroBlaze V should behave the same.

If you try it yourself, I would be glad to hear if it works.

When you open the HW Design published in this repository in Vivado 2024.1, it will first ask you to upgrade IPs. Then, the "Run Block Automation" will propose converting MicroBlaze Classic to MicroBlaze V. To be on the safe side of timing, I suggest reducing the MicroBlaze frequency to 100 MHz for the first test. Do use Vitis Classic 2024.1, not Vitis 2024.1 (i.e., Vitis Unified). Vitis Unified is an unstable mess, and it didn't support MicroBlaze when I tried it. Looking at Xilinx Forums, I'm not the only one having trouble with the MicroBlaze in Vitis Unified.

Just so you know, the testing app from this repository will not work with MicroBlaze V because it contains assembly code specific to MicroBlaze Classic.