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Phase II Lab/Experiment Hosting/Re-hosting Request for Digital Logic Design - IIITH #609

Open sravanthimodepu opened 4 years ago

sravanthimodepu commented 4 years ago

Hosting Request

sravanthimodepu commented 4 years ago

@sravanthimodepu

Hosted URL of Lab: http://cse15-iiith.vlabs.ac.in Branch: Master Tag: v1.1.3

sravanthimodepu commented 4 years ago

Hosting Request

pavanchow commented 4 years ago

@sravanthimodepu

Hosted URL of Lab: http://cse15-iiith.vlabs.ac.in Branch: Master Tag: v1.1.4 Please check and confirm.

sravanthimodepu commented 3 years ago

Hosting Request

pavanchow commented 3 years ago

@sravanthimodepu

Hosted URL of Lab: http://cse15-iiith.vlabs.ac.in Branch: Master Tag: v1.1.5 Please check and confirm.

pavanchow commented 3 years ago

Please check and confirm before raising a new request.

BalammaBoya commented 3 years ago

Hosting Request

pavanchow commented 3 years ago

@BalammaBoya

Hosted URL of Lab: http://cse15-iiith.vlabs.ac.in Branch: Master Tag: v1.1.6 Please check and confirm.

BalammaBoya commented 3 years ago

@pavanchow Hosted source is working fine.

Screenshot from 2020-12-17 15_09_29

sravanthimodepu commented 3 years ago

Request to re-host

pavanchow commented 3 years ago

@sravanthimodepu

Hosted Digital Logic Design Lab URL of Lab: http://cse15-iiith.vlabs.ac.in/ Branch: Master Tag: v1.1.7

Please check and approve. NOTE: IF NOT APPROVED WITHIN 3 DAYS, SOURCES WILL BE AUTOMATICALLY REVERTED TO OLDER VERSION.

sravanthimodepu commented 3 years ago

Request to re-host

pavanchow commented 3 years ago

@sravanthimodepu

Hosted Digital Logic Design Lab URL of Lab: https://cse15-iiith.vlabs.ac.in/ Branch: Master Tag: v1.1.8

Please check and approve.

sravanthimodepu commented 3 years ago

@pavanchow

The sources are updated correctly and approved the lab

sravanthimodepu commented 3 years ago

Repo Owner Details Name - Sravanthi GitHub handle - sravanthimodepu Email id - sravanthimodepu@vlabs.ac.in

Lab Name: Digital Logic Design Lab

List of Experiments and Repositories: | No.| Experiment Name | Experiment repository URL | Branch | Tag

  1. Adder Circuit - https://github.com/virtual-labs/exp-adder-circuit-iiith - main -v1.0.0
  2. Multiplexer - https://github.com/virtual-labs/exp-multiplexer-iiith - main -v1.0.0
  3. Decoder with 7-Segment Display - https://github.com/virtual-labs/exp-7-segment-display-iiith - main -v1.0.0
  4. ALU with function - https://github.com/virtual-labs/exp-alu-iiith - main -v1.0.0
  5. Comparator - https://github.com/virtual-labs/exp-comparator-iiith - main -v1.0.0
  6. Latch and Flip Flops - https://github.com/virtual-labs/exp-latch-and-flip-flops-iiith - main -v1.0.0
  7. Registers - https://github.com/virtual-labs/exp-registers-iiith - main -v1.0.0
  8. Counters - https://github.com/virtual-labs/exp-counters-iiith - main -v1.0.0
  9. Multipliers - https://github.com/virtual-labs/exp-multipliers-iiith - main -v1.0.0
  10. State Diagrams - https://github.com/virtual-labs/exp-state-diagrams-iiith - main -v1.0.0

Lab url: http://cse15-iiith.vlabs.ac.in/

Introduction: Welcome to the Digital Logic Design Lab. Here you can make basic combinational and sequential digital circuits of your choice and simulate them.

Please note:

Objective: The digital logic design is a system that uses simple numerical values to produce input and output operations.

Course Alignment:

Target Audience:

pavanchow commented 3 years ago

@sravanthimodepu

Hosted Digital Logic Design Lab URL of Lab: https://cse15-iiith.vlabs.ac.in/ Branch: Master

Please check and approve.

BalammaBoya commented 3 years ago

Lab Name : Digital Logic Design

Note : This lab experiments doesn't have any back end dependence for hosting.

sravanthimodepu commented 3 years ago

Repo Owner Details Name - Sravanthi GitHub handle - sravanthimodepu Email id - sravanthimodepu@vlabs.ac.in

Lab Name: Digital Logic Design Lab

List of Experiments and Repositories: | No.| Experiment Name | Experiment repository URL | Branch | Tag

  1. Adder Circuit - https://github.com/virtual-labs/exp-adder-circuit-iiith - main -v1.0.1
  2. Multiplexer - https://github.com/virtual-labs/exp-multiplexer-iiith - main -v1.0.1
  3. Decoder with 7-Segment Display - https://github.com/virtual-labs/exp-7-segment-display-iiith - main -v1.0.1
  4. ALU with function - https://github.com/virtual-labs/exp-alu-iiith - main -v1.0.1
  5. Comparator - https://github.com/virtual-labs/exp-comparator-iiith - main -v1.0.1
  6. Latch and Flip Flops - https://github.com/virtual-labs/exp-latch-and-flip-flops-iiith - main -v1.0.1
  7. Registers - https://github.com/virtual-labs/exp-registers-iiith - main -v1.0.1
  8. Counters - https://github.com/virtual-labs/exp-counters-iiith - main -v1.0.1
  9. Multipliers - https://github.com/virtual-labs/exp-multipliers-iiith - main -v1.0.1
  10. State Diagrams - https://github.com/virtual-labs/exp-state-diagrams-iiith - main -v1.0.1

Lab url: http://cse15-iiith.vlabs.ac.in/

Introduction: Welcome to the Digital Logic Design Lab. Here you can make basic combinational and sequential digital circuits of your choice and simulate them.

Please note:

Objective: The digital logic design is a system that uses simple numerical values to produce input and output operations.

Course Alignment:

Target Audience:

pavanchow commented 3 years ago

@sravanthimodepu Reverting back to old sources as requested. URL of Lab: https://cse15-iiith.vlabs.ac.in/ Branch: Master

Please check and approve.

sravanthimodepu commented 3 years ago

Repo Owner Details Name - Sravanthi GitHub handle - sravanthimodepu Email id - sravanthimodepu@vlabs.ac.in

Lab Name: Digital Logic Design Lab

List of Experiments and Repositories: | No.| Experiment Name | Experiment repository URL | Branch | Tag

  1. Adder Circuit - https://github.com/virtual-labs/exp-adder-circuit-iiith - main -v1.0.2
  2. Multiplexer - https://github.com/virtual-labs/exp-multiplexer-iiith - main -v1.0.4
  3. Decoder with 7-Segment Display - https://github.com/virtual-labs/exp-7-segment-display-iiith - main -v1.0.4
  4. ALU with function - https://github.com/virtual-labs/exp-alu-iiith - main -v1.0.3
  5. Comparator - https://github.com/virtual-labs/exp-comparator-iiith - main -v1.0.4
  6. Latch and Flip Flops - https://github.com/virtual-labs/exp-latch-and-flip-flops-iiith - main -v1.0.4
  7. Registers - https://github.com/virtual-labs/exp-registers-iiith - main -v1.0.4
  8. Counters - https://github.com/virtual-labs/exp-counters-iiith - main -v1.0.4
  9. Multipliers - https://github.com/virtual-labs/exp-multipliers-iiith - main -v1.0.4
  10. State Diagrams - https://github.com/virtual-labs/exp-state-diagrams-iiith - main -v1.0.2

Lab url: http://cse15-iiith.vlabs.ac.in/

Introduction: Welcome to the Digital Logic Design Lab. Here you can make basic combinational and sequential digital circuits of your choice and simulate them.

Please note:

pavanchow commented 3 years ago

@sravanthimodepu

Hosted Digital Logic Design Lab URL of Lab: https://cse15-iiith.vlabs.ac.in/ Branch: Master

Please check and approve.

sravanthimodepu commented 3 years ago

@pavanchow

The sources are updated. Hence approved.

sravanthimodepu commented 2 years ago

@pavanchow

Please update the below content in the introduction page and host the lab with the updated sources

Lab Name: Digital Logic Design Lab

List of Experiments and Repositories: | No.| Experiment Name | Experiment repository URL | Branch | Tag

  1. Adder Circuit - https://github.com/virtual-labs/exp-adder-circuit-iiith - main -v1.0.4
  2. Multiplexer - https://github.com/virtual-labs/exp-multiplexer-iiith - main -v1.0.6
  3. Decoder with 7-Segment Display - https://github.com/virtual-labs/exp-7-segment-display-iiith - main -v1.0.6
  4. ALU with function - https://github.com/virtual-labs/exp-alu-iiith - main -v1.0.5
  5. Comparator - https://github.com/virtual-labs/exp-comparator-iiith - main -v1.0.6
  6. Latch and Flip Flops - https://github.com/virtual-labs/exp-latch-and-flip-flops-iiith - main -v1.0.6
  7. Registers - https://github.com/virtual-labs/exp-registers-iiith - main -v1.0.6
  8. Counters - https://github.com/virtual-labs/exp-counters-iiith - main -v1.0.6
  9. Multipliers - https://github.com/virtual-labs/exp-multipliers-iiith - main -v1.0.6
  10. State Diagrams - https://github.com/virtual-labs/exp-state-diagrams-iiith - main -v1.0.4

Lab url: http://cse15-iiith.vlabs.ac.in/

Introduction: Welcome to the Digital Logic Design Lab. Here you can make basic combinational and sequential digital circuits of your choice and simulate them.

Please note: The simulations of this lab have some of the following software dependencies - Browsers - Firefox 50 and lower versions, Internet Explorer Software - Adobe Flash Plugin, Java1.7, Java3D-1.5.2, and IcedTea Plugin.

We recommend you to use our customized Virtual Box for the smooth running of these simulations.

Install VirtualBox - Virtual Labs offers a free download of a customized VirtualBox with the required pre-installed software dependencies (Java 1.7, Java3D-1.5.2, IcedTea Plugin, and Adobe Flash Plugin). Please follow the link to download, install VirtualBox for easy use of Virtual Labs.

pavanchow commented 2 years ago

@sravanthimodepu

Hosted Digital Logic Design Lab URL of Lab: https://cse15-iiith.vlabs.ac.in/ Branch: Master

Please check and approve.

BalammaBoya commented 2 years ago

@pavanchow Introduction page content is not updated, Could you please update with content below:

Screenshot from 2021-12-21 11-40-32

Introduction: Welcome to the Digital Logic Design Lab. Here you can make basic combinational and sequential digital circuits of your choice and simulate them.

Please note: The simulations of this lab have some of the following software dependencies - Browsers - Firefox 50 and lower versions, Internet Explorer Software - Adobe Flash Plugin, Java1.7, Java3D-1.5.2, and IcedTea Plugin.

We recommend you to use our customized Virtual Box for the smooth running of these simulations.

Install VirtualBox - Virtual Labs offers a free download of a customized VirtualBox with the required pre-installed software dependencies (Java 1.7, Java3D-1.5.2, IcedTea Plugin, and Adobe Flash Plugin). Please follow the link to download, install VirtualBox for easy use of Virtual Labs.

pavanchow commented 2 years ago

@BalammaBoya

Hosted Digital Logic Design Lab with updated Introduction URL of Lab: https://cse15-iiith.vlabs.ac.in/ Branch: Master

Please check and approve.

sravanthimodepu commented 2 years ago

@pavanchow

Please host the lab with the updated sources

Lab Name: Digital Logic Design Lab

List of Experiments and Repositories: | No.| Experiment Name | Experiment repository URL | Branch | Tag

  1. Adder Circuit - https://github.com/virtual-labs/exp-adder-circuit-iiith - main -v1.0.5
  2. Multiplexer - https://github.com/virtual-labs/exp-multiplexer-iiith - main -v1.0.7
  3. Decoder with 7-Segment Display - https://github.com/virtual-labs/exp-7-segment-display-iiith - main -v1.0.7
  4. ALU with function - https://github.com/virtual-labs/exp-alu-iiith - main -v1.0.6
  5. Comparator - https://github.com/virtual-labs/exp-comparator-iiith - main -v1.0.6
  6. Latch and Flip Flops - https://github.com/virtual-labs/exp-latch-and-flip-flops-iiith - main -v1.0.7
  7. Registers - https://github.com/virtual-labs/exp-registers-iiith - main -v1.0.7
  8. Counters - https://github.com/virtual-labs/exp-counters-iiith - main -v1.0.7
  9. Multipliers - https://github.com/virtual-labs/exp-multipliers-iiith - main -v1.0.7
  10. State Diagrams - https://github.com/virtual-labs/exp-state-diagrams-iiith - main -v1.0.5

Lab url: http://cse15-iiith.vlabs.ac.in/

pavanchow commented 2 years ago

@sravanthimodepu

Hosted Digital Logic Design Lab URL of Lab: https://cse15-iiith.vlabs.ac.in/ Branch: Master

Please check and approve.

BalammaBoya commented 2 years ago

@pavanchow Hosted source is working fine and It's Approved.