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Experiment Repository Creation Request for VLSI Design Verification and Testing Laboratory NITK #797

Open SOLVE-NITK opened 2 years ago

SOLVE-NITK commented 2 years ago

Repository Creation Request

Use this to get your experiment repository created or updated on GitHub under Virtual Labs organization.

  1. Coordinating Institute: NITK

  2. Approver’s Name: Prof. Mukuk S. Sutaone, Dr. G.P.S.C Mishra, Saugata Sinha, Dr R S Anand, Dr D N Sonawane

  3. Approved Proposal: VLSI.pdf

  4. Hosted url:

  5. Primary GitHub Handle Details:

    Name: SOLVE - NITK
    GitHub Handle: SOLVE-NITK
    Email id: csd@nitk.edu.in , dev.solve@nitk.edu.in
  6. Secondary GitHub Handle Details:

    Name: Akshaya Acharya
    GitHub Handle: AkshayaAcharya
    Email id: acharya.akshaya04@gmail.com
  7. Secondary GitHub Handle Details:

    Name: Anusha B Salian
    GitHub Handle: AnushaSalian
    Email id: saliananusha1994@gmail.com
pavanchow commented 2 years ago

@SOLVE-NITK Please find the links for VLSI Design Verification and Testing Laboratory experiments and populate the repositories with sources of the experiments as detailed in Step 4 of the migration document.

  1. Detection of both SAO and SA1 faults on a VLSI circuit that represents 3-input ODD function - https://github.com/virtual-labs/exp-3-input-odd-function-nitk
  2. Detection of both SAO and SA1 faults on a VLSI circuit that represents 3-input EVEN function - https://github.com/virtual-labs/exp-3-input-even-function-nitk
  3. Detection of both SAO and SA1 faults on a VLSI circuit for 3-bit EVEN parity generator circuit - https://github.com/virtual-labs/exp-3-bit-even-parity-generator-circuit-nitk
  4. Detection of both SAO and SA1 faults on a VLSI circuit for 4-bit EVEN parity checker circuit - https://github.com/virtual-labs/exp-4-bit-even-parity-checker-circuit-nitk
  5. Detection of SAO faults on selected I/O wires of a VLSI circuit for BCD-to-excess-3 code converter - https://github.com/virtual-labs/exp-sao-bcd-to-excess-3-code-converter-nitk
  6. Detection of SA1 faults on selected I/O wires of a VLSI circuit for BCD-to-excess-3 code converter - https://github.com/virtual-labs/exp-sa1-bcd-to-excess-3-code-converter-nitk
  7. Detection of SAO faults on a VLSI circuit for 2x1 multiplexer (mux) - https://github.com/virtual-labs/exp-sa0-2x1-multiplexer-nitk
  8. Detection of SA1 faults on a VLSI circuit for 2x1 multiplexer (mux) - https://github.com/virtual-labs/exp-sa1-2x1-multiplexer-nitk
  9. Detection of SAO faults on a VLSI circuit for 4x16 decoder constructed with two 3x8 decoders - https://github.com/virtual-labs/exp-sa0-3x8-decoders-nitk
  10. Detection of SA1 faults on a VLSI circuit for 4x16 decoder constructed with two 3x8 decoders - https://github.com/virtual-labs/exp-sa1-3x8-decoders-nitk
  11. Detection of SAO faults on a VLSI circuit for 4-input Priority Encoder circuit - https://github.com/virtual-labs/exp-sa0-4-input-priority-encoder-circuit-nitk
  12. Detection of SA1 faults on a VLSI circuit for 4-input Priority Encoder circuit - https://github.com/virtual-labs/exp-sa1-4-input-priority-encoder-circuit-nitk