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Experiment Repository Creation Request for "Digital Logic Circuit Design Virtual Lab" - IIT Kharagpur #862

Open AKRNANDULA opened 1 year ago

AKRNANDULA commented 1 year ago

Repository Creation Request

Use this to get your experiment repository created or updated on GitHub under Virtual Labs organization.

  1. Coordinating Institute: Indian Institute of Technology Kharagpur

  2. Virtual Lab Name: Digital Logic Circuit Design Virtual Lab

  3. Approved Proposal: Digital_Logic_Circuit Design_Virtual_Lab_IITKGP.pdf

  4. Experiment List:

    • Logic Simplification
    • Combinational Logic Design
    • Serial and Parallel Adders
    • Edge triggered FF
    • Ripple and Synchronous counters
    • Shift registers
    • Finite state machines
    • Design of synchronous FSM
    • Digital comparator
    • Parity checker / generator

  5. Primary GitHub Handle Details:

    Name: Virtual Labs IIT Kharagpur

    GitHub Handle: VLabs-IITKharagpur

    Email id: vlabsiitkgpaws@gmail.com

  6. Secondary GitHub Handle Details:

    Name: Aditya Kameswara Rao Nandula

    GitHub Handle: AKRNANDULA

    Email id: adirosgaz@gmail.com

pavanchow commented 1 year ago

@AKRNANDULA Please find the links for Digital Logic Circuit Design Virtual Lab experiments and populate the repositories with sources of the experiments as detailed in Step 4 of the migration document

  1. Logic Simplification - https://github.com/virtual-labs/exp-logic-simplification-iitkgp
  2. Combinational Logic Design - https://github.com/virtual-labs/exp-combinational-logic-design-iitkgp
  3. Serial and Parallel Adders - https://github.com/virtual-labs/exp-serial-parallel-adders-iitkgp
  4. Edge triggered FF - https://github.com/virtual-labs/exp-edge-triggered-ff-iitkgp
  5. Ripple and Synchronous counters - https://github.com/virtual-labs/exp-ripple-synchronous-counters-iitkgp
  6. Shift registers - https://github.com/virtual-labs/exp-shift-registers-iitkgp
  7. Finite state machines - https://github.com/virtual-labs/exp-finite-state-machines-iitkgp
  8. Design of synchronous FSM - https://github.com/virtual-labs/exp-design-synchronous-fsm-iitkgp
  9. Digital comparator - https://github.com/virtual-labs/exp-digital-comparator-iitkgp
  10. Parity checker / generator - https://github.com/virtual-labs/exp-parity-checker-iitkgp
AKRNANDULA commented 1 year ago

@pavanchow ok Thank you