[asm] Design the `asmik` -- Sleepy VM Assembly language

[vityaman]

What we need

• [ ] Labels for functions and if statements
• [x] Call by label (address)
• [x] Conditional jump to label
• [x] Compare EQ, LT,
• [x] Logical OR, NOT
• [x] Math: Sum, Rem
• [x] Load & Store

[vityaman]

Registers:
| Reg | Name | Desc           |
| --- | ---- | -------------- |
| r0  | ze   | hardwired zero |
| r1  | ip   | instr pointer  |
| r2  | sp   | stack pointer  |
| r3  | ra   | return addr    |
| r4  | t1   | tmp            |
| r5  | t2   | tmp            |
| r6  | t3   | tmp            |
| r7  | t4   | tmp            |
| r8  | t5   | tmp            |
| r9  | t6   | tmp            |
| rA  | a1   | args[0], ret   |
| rB  | a2   | args[1]        |
| rC  | a3   | args[2]        |
| rD  | a4   | args[3]        |
| rE  | a5   | args[4]        |
| rF  | a6   | args[5]        |

Instructions:
| Mnem               | Sym                             |
| ------------------ | ------------------------------- |
| addi  rA, rB, rC   |  rA  <-  rB + rC                |
| addim rA, rB, imm8 |  rA  <-  rB + imm8              |
| muli  rA, rB, rC   |  rA  <-  rB * rC                |
| divi  rA, rB, rC   |  rA  <-  rB / rC                |
| remi  rA, rB, rC   |  rA  <-  rB % rC                |
| slti  rA, rB, rC   |  rA  <- (rB < rC) ? 1 : 0       |
| load  rA, rB       |  rA  <- [rB]                    |
| stor  rA, rB       | [rA] <-  rb                     |
| orb   rA, rB, rC   |  rA  <-  rB | rC                |
| andb  rA, rB, rC   |  rA  <-  rB & rC                |
| xorb  rA, rB, rC   |  rA  <-  rB ^ rC                |
| brn   rA, rB       |  ip  <-  (not rA) ? rB : ip + 4 |
| hlt                | ...                             |

[vityaman]

Example: Arithmetics

(sum (div 5 2) (rem (sum 2 2) 2))

label(main):
  var(0): int = load(const(5): int): int
  var(1): int = load(const(2): int): int
  var(2): int = div(var(0): int, var(1): int): int
  var(3): int = load(const(2): int): int
  var(4): int = load(const(2): int): int
  var(5): int = sum(var(3): int, var(4): int): int
  var(6): int = load(const(2): int): int
  var(7): int = rem(var(5): int, var(6): int): int
  var(8): int = sum(var(2): int, var(7): int): int

  var(9): int = load(const(0): int): int
  return var(9): int

memory stack:
- 000: 5 # const(5): int
- 008: 2 # const(2): int

memory instr:
- 000: addi r3, ze, ze    # v0: int = load(c5: int): int
- 004: load r3, r3        #
- 008: addi r4, ze, 8     # v1: int = load(c2: int): int
- 012: load r4, r4        #
- 016: divi r5, r3, r4    # v2: int = div(v0: int, v1: int): int
- 020: addi r6, ze, 8     # v3: int = load(c2: int): int
- 024: load r6, r6        # 
- 028: addi r7, ze, 8     # v4: int = load(c2: int): int
- 032: load r7, r7        #
- 036: addi r8, r6, r7    # v5: int = sum(v3: int, v4: int): int
- 040: addi r9, ze, 8     # v6: int = load(c2: int): int
- 044: load r9, r9        # 
- 048: remi r10, r8, r9   # v7: int = rem(v5: int, v6: int): int
- 052: addi r11, r5, r10  # v8: int = sum(v2: int, v7: int): int
- 056: addi r12, ze, ze   # var(9): int = load(const(0): int): int
- 060: load r12, r12      #
- 064: hlt

[vityaman]

Example: Conditional

(if (eq 1 1) 1 1)

label(main):
  var(0): int = load(const(1): int): int
  var(1): int = load(const(1): int): int
  var(2): bool = eq(var(0): int, var(1): int): bool
  if var(2): bool then label(0) else label(1) end label(2)
  label(0):
    var(3): int = load(const(1): int): int
    goto label(2)
  label(1):
    var(4): int = load(const(1): int): int
    var(3): int = copy(var(4): int): int
    goto label(2)
  label(2):
  var(5): int = load(const(0): int): int
  return var(5): int

memory stack
- 000: 1 # const(1): int
memory instr
- 000: addi r3, ze, 0   # v0 = load(c1: int): int
- 004: load r3, r3      # 
- 008: addi r4, ze, 0   # v1 = load(c1: int): int
- 012: load r4, r4      # 
- 016: slti r5, r3, r4  # v2 = eq(v0: int, v1: int): bool
- 020: slti r6, r4, r3  #   r5 is (r3 < r4), r6 is (r4 < r3)
- 024: orb  r6, r5, r6  #   r6 is ((r3 < r4) or (r4 < r3))
- 036: addi r6, ip, 28  # if v2 then l0 else l1 end l2
- 040: br   r5, r6      # 
- 044: addi r7, ze, 0   # l0: v3 = load(c1: int): int
- 048: load r7, r7      # 
- 052: addi r8, ze, 1   # goto l2
- 056: addi r9, ip, 20  # 
- 060: br   r8, r9      # 
- 064: addi rA, ze, 0   # l1: v4 = load(c1: int): int
- 068: load rA, rA      #
- 072: addi r7, rA, 0   # v3 = copy(v4: int): int
- 076: addi rB, ze, ze  # l2: v5 = load(c0: int): int
- 080: hlt

[vityaman]

Example: Procedure

(def id (lambda (n int) n))
(id 5)

procedure 0(var(0): int) -> int
label(0):
  return var(0): int

label(main):
  var(1): (int) -> int = load(const(0): (int) -> int): (int) -> int
  var(2): int = load(const(5): int): int
  var(3): int = invoke(var(1): (int) -> int)(var(2): int): int
  var(4): int = load(const(0): int): int
  return var(4): int

memory stack
memory instr
- 000: addi t1, ze, 28 # v1 = load(c0: (int) -> int): (int) -> int
- 004: addi t2, ze, 5  # v2 = load(c5: int): int
- 008: addi ra, ip, 12 # return address
- 012: addi a1, t2, 0  # args[1] = t2 = v2 = c5
- 016: brn  ze, t1     # TODO: "branch if not" is better to use ze register
- 020: addi t4, ze, 0  # v4 = load(c0: int): int
- 024: hlt
- 028: brn  ze, ra     # l0: return var(0): int

[vityaman]

No halt just infinity loop