search

vnegnev / marcos_fpga

FPGA build and project files for MaRCoS
GNU General Public License v3.0
3 stars 2 forks source link

SERVER ERROR: RX FIFO/s full duration sequence around byte address 0x50c' #3

Open zkjiang opened 3 weeks ago

zkjiang commented 3 weeks ago

When I use the latest marcos_extras such as branch vn/mimo or a self compiled FPGA bit file, vn/clock_forward

the client's read function rxd, msgs = exp.run() plt.plot(np.abs(rxd["rx0"])) plt.plot(np.abs(rxd["rx1"]))

keeps popping up an error 'SERVER ERROR: RX FIFO/s full duration sequence around byte address 0x50c'

if I use the old marcos_extras - master it turns to normal and no error when i Sample 2000 points in channel 1， Sample 3000 points in channel 2

and I also want to get the old fpga code to generate old bit file such as marcos_fpga-master ,https://github.com/catkira/flocra_system.git to generate the [marcos_fpga_rp-122.bit]

1724145018073
vnegnev commented 3 weeks ago

Thanks for raising this - let's discuss it on the other issue you've opened ( https://github.com/vnegnev/marcos_extras/issues/18 ).