Open remy-luisant opened 1 year ago
Sorry for delay with the answer and thank you for reporting this problem.
I am really interesting in the source code. Could you, please, post it here. I'll try to investigate it and write when and what could be fixed after that.
Gladly. The code is very long, and I do not wish to share it here. Do you have a mail address that I could use?
Gladly. The code is very long, and I do not wish to share it here. Do you have a mail address that I could use?
vmakarov@redhat.com
Highly redundant MIR is optimized into this.
Of note is that a stack frame is being made, without need for it. Also, a register is being spilled when it is not being used. This is due to the hard register information being computed before other passes remove the need to have the register be spilled.
Also of note is the use of RAX instead of RDI, for the first parameter.
Finally, the constant zero is written to RCX, when it could have been merged with the two moves at offsets 52 and 53.
Many of these strike me as low hanging fruit. I'm on the bbv branch. Input code available on request, by email.