Bug in Verilator simulation

[kuoyaoming93]

Hi all, @michael-platzer,

I'm trying to do a simple test with the new Verilator simulation scripts, using the commit 60ec4a7333734e8ee0669431194217c155306186

It seems that something is broken. For example:

#include <uart.h>
#include <stdint.h>

#define q_field 16
#define M_code 16
#define dc 4

int main(void)
{
    int16_t     Rmn_SRL[M_code][q_field][dc];
    int i,j,k;
    uart_printf("Hello World from Vicuna!\n");

    for (i = 0; i<M_code; i++)
        for (j=0; j<q_field; j++)
            for (k=0; k<dc; k++)
                Rmn_SRL[i][j][k] = 0;

    uart_printf("PEPE\n");

    asm volatile("jr x0;");
    return 0;
}

The output is only:

"PEPE" is not shown there.

[michael-platzer]

@kuoyaoming93 Thanks for reporting this, I will look into it.

[michael-platzer]

@kuoyaoming93 This should now be fixed in 1b32c13.

[michael-platzer]

@kuoyaoming93 Closing this issue since I assume the bug is fixed. Please reopen if you still encounter this issue.