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vroland / epdiy-hardware

Hardware design files for EPDiy: https://github.com/vroland/epdiy.
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Missing parts in BOM #14

Open maximelouet opened 6 months ago

maximelouet commented 6 months ago

Hi, and thanks a lot for providing all of this!!

I'm trying to get the board printed and assembled through JLCPCB but I get the following error when uploading the gerbers and BoM files:

The below parts won't be assembled due to data missing.
J2,J3,J5,J6,J7 designators don't exist in the BOM file.

jlcpcb-error

Indeed, when checking in the BoM file, these 5 items are missing. These parts don't seem to be optional, so I don't really want to continue without them.

It seems they've been removed from the BoM in this commit: https://github.com/vroland/epdiy-hardware/commit/f67d0ec701ee9243f95e018740200eee1eb12c22, I don't know if it was intentional.

Thanks for your help!

martinberlin commented 6 months ago

Hi Máxime, J* symbols in KiCad refer to Jumpers or Sockets which are non parts usually. It could be that are in the POS file and that’s why this alert comes. Try opening with KiCad and check it out. Is a good idea to learn using it if you will send PCBs to fabrication

martinberlin commented 2 months ago

Closed #16 since was a duplicate of this. Will check tomorrow to mark this parts not to be exported in BOM /CPL

BackSlasher commented 2 months ago

@martinberlin apologies if it's a stupid question - do you consider int a valid workaround to remove the J parts from the positioning file and submit to the assembling store? Will I not be missing parts?

martinberlin commented 2 months ago

Sure, but first check it. You should install KiCad and check it out. It’s not essential but recommended if you send stuff to fabrication, then you can check everything, from schematic to PCB. If you check schematic you will see also what are those parts. Usually J* are jumpers so this are not placeable components just drawn in the Gerbers files

martinberlin commented 2 months ago

Here you can see it more clearly: Screenshot from Schematics Screenshot from PCB Front layer

@vroland we need to add this parts as "Do not export to BOM" in KiCad PCB