Closed Fabian-Schmidt closed 9 months ago
V6 PCB exposes IO12 as external IO:
I think removing the GPIO12 isolate is OK but if I'm missing something please let me know @vroland @jdoubleu
What I'm not sure if it's good to do it like this or is better to add a #ifdef constraint and do it only for Lilygo EPD47 board. Please clarify this point.
I belive disabling GPIO12 slightly lowers power draw in deep sleep, that's why we did it. But I can instead just add a hint to the docs and then merge it :)
I can alter the PR to add an #ifdef
so by default it is disabled, but if somebody needs GPIO12 they can use it.
I will make soon some tests but at the moment I've run out of V5 & V6 models and I guess this applies only to ESP32-WROVER and not to ESP32-S3 right. If the power different is just a few micro amps I guess it could be just left enabled since it won't make such a huge difference.
Could you maybe add the code that is deleted to the docs, mentioning that it can be added to optimize deep sleep consumption?
Hi @vroland, I added to deleted code to the readme.
Sorry @Fabian-Schmidt lets close this MR and add this small change when https://github.com/vroland/epdiy/pull/251 is merged since the code changes significantly after that is merged
The epdiy library disables GPIO 12 on power down/off operation. Despite GPIO PIN 12 is not being used by any supported board for any operation within this library.
My supported LILYGO® T5-4.7 has only 4 free GPIO (12,13,14,15 - in two connectors on the upper left) and I need all of them.![LILYGO® T5-4.7](https://m.media-amazon.com/images/S/aplus-media-library-service-media/8a1c326c-2d76-4b35-b74f-05c96acfea0b.__CR0,0,970,600_PT0_SX970_V1___.jpg)
GPIO 12 has limited usage as it is a strapping pin. I am using it as a UART Tx pin and it is working fine. (Cannot use it as UART Rx pin - if pulled high during boot ESP does not detect it has PSRAM).
This PR fixes issue #220