search

vygr / C-PCB

C++14 PCB autorouter
GNU General Public License v2.0
75 stars 17 forks source link

Clarify Input and Output Formats #5

Closed Immortalin closed 6 years ago

Immortalin commented 6 years ago

Hi! This looks really great, do you think you can clarify the file types for input and output? Are the .dsn Specctra Netlists? What about the .pcb formats? Proteus?

vygr commented 6 years ago

DSN is Specctra yes, but only supports a subset of it.

PCB is my own format. Very simple track list as described in the Readme. I am going to detail this a little more shortly to help out the guys involved in the pcb-rnd project as I have a free days off work.

Regards

Chris

—————- Chris Hinsley

On 5 Sep 2018, at 1:05 am, Immortalin notifications@github.com wrote:

Hi! This looks really great, do you think you can clarify the file types for input and output? Are the .dsn Specctra Netlists? What about the .pcb formats? Proteus?

— You are receiving this because you are subscribed to this thread. Reply to this email directly, view it on GitHub, or mute the thread.

Immortalin commented 6 years ago

What steps would it take to get this working out of the box with KiCad?

vygr commented 6 years ago

TBH, no idea. I’ve no experience with Ki-cad or its apis.

This started as a hobby challenge project for me and I only reverse engineered enough of the DSN format to allow me to run various friends hobby boards through it.

Since then the chaps at pcb-rnd are interested in using it as a router for their project and are going to feed it via its stdin/stdout pcb format.

I’ve yet to put some more details in the readme to flesh out the pcb spec for them. Will try doing that this weekend.

Regards

Chris

—————- Chris Hinsley

On 6 Sep 2018, at 7:27 pm, Immortalin notifications@github.com wrote:

What steps would it take to get this working out of the box with KiCad?

— You are receiving this because you commented. Reply to this email directly, view it on GitHub, or mute the thread.

Immortalin commented 6 years ago

Any plans to support kicad netlist? Sample format:

(export (version D)
  (design
    (source "/home/EE/netlist.py")
    (date "09/11/2018 04:03 PM")
    (tool "HDL (0.0.23)"))
  (components
    (comp (ref R1)
      (value 1K)
      (footprint Resistors_SMD:R_0805)
      (fields
        (field (name keywords) "r res resistor")
        (field (name description) Resistor))
      (libsource (lib Device.lib) (part R))
      (sheetpath (names /top/13448767886349114037) (tstamps /top/13448767886349114037)))
    (comp (ref R2)
      (value 500)
      (footprint Resistors_SMD:R_0805)
      (fields
        (field (name keywords) "r res resistor")
        (field (name description) Resistor))
      (libsource (lib Device.lib) (part R))
      (sheetpath (names /top/5629686758559760794) (tstamps /top/5629686758559760794))))
  (nets
    (net (code 0) (name GND)
      (node (ref R2) (pin 2)))
    (net (code 1) (name VI)
      (node (ref R1) (pin 1)))
    (net (code 2) (name VO)
      (node (ref R1) (pin 2))
      (node (ref R2) (pin 1))))

Standard S-expressions syntax, nothing too fancy.

vygr commented 6 years ago

I’m not planning to myself ATM but I believe the pcb-rnd project can deal with that format and so will be able to feed c_pcb that way ?

—————- Chris Hinsley

On 12 Sep 2018, at 3:13 am, Immortalin notifications@github.com wrote:

Any plans to support kicad netlist? Sample format:

(export (version D) (design (source "/home/EE/netlist.py") (date "09/11/2018 04:03 PM") (tool "HDL (0.0.23)")) (components (comp (ref R1) (value 1K) (footprint Resistors_SMD:R_0805) (fields (field (name keywords) "r res resistor") (field (name description) Resistor)) (libsource (lib Device.lib) (part R)) (sheetpath (names /top/13448767886349114037) (tstamps /top/13448767886349114037))) (comp (ref R2) (value 500) (footprint Resistors_SMD:R_0805) (fields (field (name keywords) "r res resistor") (field (name description) Resistor)) (libsource (lib Device.lib) (part R)) (sheetpath (names /top/5629686758559760794) (tstamps /top/5629686758559760794)))) (nets (net (code 0) (name GND) (node (ref R2) (pin 2))) (net (code 1) (name VI) (node (ref R1) (pin 1))) (net (code 2) (name VO) (node (ref R1) (pin 2)) (node (ref R2) (pin 1)))) Standard S-expressions syntax, nothing too fancy.

— You are receiving this because you commented. Reply to this email directly, view it on GitHub, or mute the thread.

vygr commented 6 years ago

pcb-rnd just started testing a version with C-PCB integrated ! :)