The test does an ld on aligned address 0x80002000. The test when run with different register operands does not show any misaligned address exception but using the same address with rs1 == rd generates an exception
For example, in the ld s2, 0(s2) case as seen above with s2 = 0x80002000 (aligned), data from mem location s2 updates the s2 without any exception. Now for the updation of s3 register, instead of taking the old s2 (aligned); the spike takes the new s2 (from test memory) and generates an exception.
When the test is modified to have the test memory to also have an aligned address for the new s2 value, the exception is not seen. if the 2 loads to the s2, s3 has to happen atomically with the same address and address+4, then the spike has to be fixed
ld misaligned with spike for aligned address:
ld_test.zip
0x80002000
. The test when run with different register operands does not show any misaligned address exception but using the same address with rs1 == rd generates an exceptionld s2, 0(s2)
case as seen above with s2 = 0x80002000 (aligned), data from mem location s2 updates the s2 without any exception. Now for the updation of s3 register, instead of taking the old s2 (aligned); the spike takes the new s2 (from test memory) and generates an exception.To reproduce the issue