Open NoNamedCat opened 8 months ago
If you have some room left on the board, some 100nF capacitors for the power pins of the CH340 and PY32 will make the whole thing a little more stable, although it certainly works without it.
Ok. I swapped the DTR and RTS lines and added 100nf caps on 5v and 3.3v lines. But I don't understand why we need to swap the RX and TX pins on the board. With serial ports you need to connect the RX pin (on the serial ic) to TX pin (on the MCU) and the TX pin (on the serial IC) to the RX pin (on the MCU). The TX pin on the CH320 transmit, and the PY32F002 PA3 receive The RX pin on the CH320 receive, and the PY32F002 PA2 transmit.
I will test if the TX and RX are fine with my old design and will make the changes if the lines are truncated on the design. Tks a lot again Wagiminator.
The RX and TX lines works fine for me.
I have a problem with the current design. I want to make a panelization (Array of boards) of the design. The USB port and the buttons for reset and boot crash in the panel. The idea is to make a panel of 3*2 on the standard size of the JLCPCB. If the board works I think that we don't need the buttons in the board. Do you think that we need the buttons?
I never mentioned TX/RX. You should swap PF2 (NRST) PB6 (BOOT0) on the MOSFET circuit (see HalfSweet's circuit).
Well, if it works you don't necessarily need the buttons. If necessary, you can connect some via the pinouts.
I'll probably have to adjust the ISP software...
I'm sorry for the spam. This design would not exist if it weren't for you. Tks a lot.
Actually it's a very simple question...the condition for py32 to enter the bootloader is very simple, just have the boot0 pin high at reset. So we may easily find a similar schematic online. But there is a problem, when we switch the serial port on and off, the level of DTR and RTS may not be fixed, which may cause us to enter a different mode than expected by mistake. And in the Arduino IDE, DTR and RTS are set to true when the serial port monitor is turned on - a very bad design, and to avoid this problem, back when I was designing the Air001 development board I included the An ESP32 autodownload-like design using two BJT/MOS to implement a hardware heterodyne circuit, which we can see in https://gitee.com/openLuat/luatos-broads/tree/master/broads/Air001-Board at the time.
Of course there is a slight problem with this circuit, which means we can't control the levels of boot0 and RST at the same time, so we compensated for this by connecting a capacitor in parallel to GND for both boot0 and RST, and performing pull-downs and pull-ups according to the needs of the running app.
Alternatively, you can view a typical PY32F030 development board design https://github.com/HalfSweet/PY32F030K28U_Arduino_Nano
At AirISP, I implemented the automatic download logic for the relevant circuits
You are a FullSweet ;) tks a lot for sharing your knowledge with me. Can I share this conversation with Wagiminator so he can design his board too?
You are a FullSweet ;) tks a lot for sharing your knowledge with me. Can I share this conversation with Wagiminator so he can design his board too?
Of course, our sessions are open and we can have discussions together if we can
That looks promising.
Hello again. It is possible to implement this type of schema for the boot-loader in the code?
I'm designing a new board for the PY32F002A micro-controller, wondering about using the CH340X as a USB-Serial communication IC for the board. If this could be implemented, I think is a no brainer to choose that IC instead of the CH340N (That doesn't have DTR or RTS)