Open tannewt opened 1 year ago
I have started adding some universal immediate markers like:
{clock,valid}
, {clock,valid,ready}
I want to keep marker functionality as generic as possible.
I also see, several distinct modeling domains that need different approach: 1) RTL simulation: 0/1/x/z/... levels, multi-bit buses, with dedicated clock signal (like example above) 2) Digital IO: more of I2C, SPI, Logic-analyzer Sigrok territory. with 20 / 80% threshold, hysteresis, single-bit signals, clock recovery, etc. 3) LVDS (high speed) differential, eye patters, Jitter, ... 4) Analog (Low speed), Audio, filtering, FFT, ... 5) RF, complex, S-parameters
Any thoughts about how to include higher level markers and annotations? I'm interested in processing VCD files to produce higher level annotations like I2C and SPI transactions. (Something along the lines of sigrok or gtkwave filters but using vcdrom) Ideally they'd be output by python vcd analyzer plugins. Thanks!