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westerndigitalcorporation / swerv_eh1_fpga

FPGA reference design for the the Swerv EH1 Core
Apache License 2.0
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An error happened when GDB try to connect to openocd #6

Closed qiongao closed 5 years ago

qiongao commented 5 years ago

I run "target remote localhost:3333" at gdb terminal, and got information below in the terminal which was running openocd. (I am using Zynq board and I have reconstrained pins by myself)

adapter speed: 1500 kHz Info : clock speed 1500 kHz Info : JTAG tap: riscv.cpu tap/device found: 0x00000001 (mfg: 0x000 (), part: 0x0000, ver: 0x0) Info : datacount=2 progbufsize=0 Warn : We won't be able to execute fence instructions on this target. Memory may not always appear consistent. (progbufsize=0, impebreak=0) Info : Examined RISC-V core; found 1 harts Info : hart 0: XLEN=32, misa=0x40001104 Info : Listening on port 3333 for gdb connections Now, you can connect GDB... Info : Listening on port 6666 for tcl connections Info : Listening on port 4444 for telnet connections Info : accepting 'gdb' connection on tcp/3333 Error: Timed out after 2s waiting for sbbusy to go low (sbcs=0x2073040f). Increase the timeout with riscv set_command_timeout_sec. Warn : negative acknowledgment, but no packet pending Error: Timed out after 2s waiting for sbbusy to go low (sbcs=0x2073040f). Increase the timeout with riscv set_command_timeout_sec. Warn : negative acknowledgment, but no packet pending Warn : keep_alive() was not invoked in the 1000ms timelimit. GDB alive packet not sent! (1002). Workaround: increase "set remotetimeout" in GDB Error: Timed out after 2s waiting for sbbusy to go low (sbcs=0x2073040f). Increase the timeout with riscv set_command_timeout_sec. Error: Timed out after 2s waiting for sbbusy to go low (sbcs=0x2073040f). Increase the timeout with riscv set_command_timeout_sec. Warn : negative acknowledgment, but no packet pending Warn : keep_alive() was not invoked in the 1000ms timelimit. GDB alive packet not sent! (1493). Workaround: increase "set remotetimeout" in GDB

Thanks.

arupde171 commented 5 years ago

It looks like a hardware issue. You need to check JTAG ports and Zynq FPGA design to fix this issue. The reference design only supports Nexyx 4 board.