Open kiranps19 opened 3 weeks ago
Hi, It's weird because SSD1322 datasheet explicitly shows that clock is high when idle (CPOL=1) and MOSI is probed at rising edge that is 2nd edge (CPHA=2). If I have any spare time soon I will wire up my display and check it in both modes.
Hi,
Thanks for the library. I've got it working with STMH755ZIQ. One of the problems i faced was , when i setup SPI configuration based on the read me which is
clock polarity (CPOL) = High clock phase (CPHA) = 2 Edge
It didn't work, So i just tried the normal one, CPOL = low and CPHA = 1 edge. This worked for me, i'm using this board https://www.aliexpress.com/item/1005006161591545.html. Might be helpful for some people. I didn't know where to mention this, so i just raised an issue, sorry.
Regards, Kiran