RDS data seems to be bogus

[wmarkow]

In my solution I'm using RDA5807M chip. However it works nice as a FM tuner, I have some issues with RDS data. I'm using my fork of mathertel/Radio library. At the beginning I'm focused on receiving RDS 4A group which contains data related to time and date.

The issue is that data received from the chips seems to be bogus. The time is quite not correct. It seems to get some random values, like 33:23 for example.

[wmarkow]

I have un-commented some code in the mathertel/Radio library to print more verbose debug information (like a HEX dump of all four received blocks for current group) to serial port. According to the EN50067_RDS_Standard the first block should contain the station's PI code which should be always the same (for the currently tuned station). But the library prints various PI codes for the same station. I have checked here that my station have PI code as 0x3293. Some times this code appears in the serial logs but other codes are printed as well. I think I should suspect that the other codes are not valid and I should somehow reject the groups with invalid codes.

Thanks for @DerKleineLeif, who posted in his project the link to the RDS specification and gave some input about his experience with RDA5807M chip.

[wmarkow]

RDS has the CRC mechanism to detect and correct the errors. Every block contains 10 bits of checksum. Every RDS group contains 4 blocks so there should be 4 checksums available. According to RDA5807M datasheet there are only some indicators available only for blocks A and B (bits BLERA and BLERB in register 0BH).

I have modified the mathertel/Radio library to read the 0BH register (and BLERA, BLERB bits as well) but it still prints some other PI codes even if the BLERA and BLERB are different than 0x03 - which means that the error could be corrected.

I think there is something wrong with RDA5807M, or at leas the one that I have is buggy.

[wmarkow]

I think I will buy Si4703 and see how it works with the same conditions as I have tested with RDA5807M. According to the documentation, Si4703 indicates errors for all four received blocks.

[wmarkow]

I have made more tests and I can say that the receiver's antenna has something to do in case of RDS. In my project I have a 80cm long wire as an antenna and I wasn't paying any more attention in this topic. What I have found (in terms of RDS): the better antenna the better RDS data reception. Here is the example of RDS blocks hex dump where my wire antenna is freely laying on the table (so it was placed horizontally):

(C110 C005 2A0E B9B6
(2E08 120A A812 2094
(54C4 26B DB85 53E7
(2E5 C4B3 882F CED1
(B2B4 5C2A BE1E 4897
(74DA EF4A 8AA7 93A1
(A02 FA05 1048 4CF
(256C 490E 4008 110C
(29CA 1F10 AB55 DF98
(B785 9F48 4C92 4E4B
(B0D0 2D0 CAC5 8581
(49C0 9E78 DA60 402A
(CB7C C0FE 4F29 4594
(3CC3 5376 5BC7 EB79
(A85 432C 6000 6D53
hours= 6
mins= 53
Time:16:23
rssi= 26
(8824 A10F 5676 42A6
(8420 52B9 8124 B9A8
(AA73 1211 7EC7 100

The first column is first block and it should contain PI code with value 0x3293. For those dumps the BLERA and BLERB was always lower that 3, but I do not know if I should trust BLERA and BLERB bits because the RDA5807M says that those bits works only when RDS is in verbose mode but the document doesn't say how to enable this verbose mode. So for now I do not know if verbose mode is enabled in my RDA5807M chip. For the dumps above, the average RSSI value read from the chip was 26.

When I touched with my hand the wire antenna and moved it up (so it was vertically positioned) I have observed a better RDS reception. The average RSSI level was 29 and the HEX dump of the blocks is here:

(3293 548 91B5 3E20
(3293 2547 437A 6173
(3293 549 B6CD 4553
(3293 2548 6965 2020
(3293 54A E61A 4B41
(3293 2549 2020 2020
(3293 54F 3F45 203C
(3293 254A 2020 2020
(3293 548 91B5 3E20
(3293 254B 2020 2020
(3293 549 B6CD 4553
(3293 254C 2020 2020
(3293 54A E61A 4B41
(3293 254D 2020 2020
(3293 54F 3F45 203C
(3293 254E 2020 2020
(3293 548 91B5 3E20
(3293 254F 2020 2020
(3293 549 B6CD 4553
(3293 54A E61A 4B41
(3293 2540 4553 4B41

In the dump above all of the PI codes were correct 0x3293. The BLERA and BLERB were mostly set to 0 (but I still don't know if I should trust them, because I do not know if my chip is in RDS verbose mode). In this state I didn't notice that my station sends any 4A RDS group (related to date and time information). Probably the time and date group were wrongly received because of a poor antenna.

[wmarkow]

I think this issue is an effect of how RDA5807M works and we need to live with this. I have observed that this chip feeds you with a bogus/invalid RDS groups. The chip only gives the error information for blocks A and B. Even if it say that there are no errors for block 1 and 2 (bits BLERA and BLERB), we know nothing about errors in block C and D. Moreover the documentation says that bits BLERA and BLERB are available only in the RDS verbose mode but the docs doesn't say how to enable this mode or if this mode is enabled automatically after reset, so I do not know if I should use those BLERA and BLERB bits.

The RDS Time Groups - that I have received - were an effect of those bogus/invalid RDS groups that RDA5807M was giving me. I have noticed that it starts to output bogus frames where the signal reception is not good or poor (when I had a poor antenna).

As a workaround I have introduced in my project a RDS group validation:

• I'm checking if the Country Code from BLOCK 1 (Annex D of EN50067_RDS_Standard matches my country; if not - then the whole RDS group goes to trash
• for groups of version B, the BLOCK 1 should be exactly the same as BLOCK 3; if they do not mach, the whole RDS group goes to trash

This helps a lot to lower the ratio of invalid RDS groups read from the RDA5807A.

[wmarkow]

In the project I have implemented my own CRDSParser (mostly its source code is taken from https://github.com/mathertel/Radio library) and introduced a validation method.

[wmarkow]

I'm closing this issue since some things have been clarified.

[VladimirTsibrov]

I think I will buy Si4703 and see how it works with the same conditions as I have tested with RDA5807M. According to the documentation, Si4703 indicates errors for all four received blocks.

RDA5807M has BLERC and BLERD in 15-12 bits of 0x10 register. And yes, I have the same problems with RDS

[wmarkow]

@VladimirTsibrov mostly those RDA5807M datasheets that I have found in the Internet say nothing about register 0x10. The last described register is 0x0F. Where did you take it from? Do you have link? Is it some kind of undocumented feature?

[VladimirTsibrov]

I am working with the RDA5807M and I must say that the quality of its datasheet is awful. Therefore, I had to read the documentation of other tuner chips of this series (and not only RDA5807), compare it. And I found a number of parameters that are missing in the datasheet of RDA5807M. Others, on the contrary, are described, but are not related to RDA807M. For example bits 7-6 of 05H is LNA_PORT_SEL. I think you know that. 08H - FREQ_DIRECT missed too, it allows you to set the frequency in an alternative way: when FREQ_MODE (0 bit of 07H) = 1 the resulting frequency = low bound of band + FREQ_DIRECT (in kHz). I can’t say right now where exactly I found it. As for BLERC and BLERD look at RDA5802 datasheet: https://drive.google.com/file/d/1JaUnlRA9GJ46rKAGW7OIxU6hITcqunNX/view?usp=sharing I'm trying to add RDS support in my radio on RDA5807M. And I see, that data comes with a lot of mistakes. Maybe the situation will change with a good antenna. But for pocket radio I do not see solutions.

[wmarkow]

@VladimirTsibrov, thanks for the datasheet of RDA5802. I didn't try the BLERC and BLRED registers because I have noticed that on my RDA5807 the BLERA and BLERB seem to not work. Currently I relay on my own additional validation.

I have also found this comment on Arduino Radio with RDS. The author also writes about register 10H and bits 15:14 (BLERC) and 13:12 (BLERD). Moreover, he found how to enable the verbose mode: just need to write three bytes (0x56 0xAE 0xFF) into 0x11 device address.

I quote the whole comment:

Zsolt Kovari wrote 12/20/2017 at 22:19

Hi Everybody,

First of all, sorry for my bad English :-)

I just like to tell you a few ideas about my project with RDA5807M. Its TDS does not tell everything. It says for BLERA (REG:0BH<3:2>) and BLERB (REG:0BH<1:0>) that "Available only in RDS Verbose mode". But nowhere tells how to switch ON the VERBOSE MODE. I could find, if REG:56H<7:0>=FFH than it works. Furthermore, where is BLERC and BLERD? I could find at REG:10H<15:14> and REG:10H<13:12>. The other question: How to write REG:56H? (Because, according TDS it is not possible)

It is a simple BASIC sample:

I2C write &H11, 3, &H56, &HAE, &HFF

'WRITE to &H11 adress, 3 bytes, REG adress, HIGH byte, LOW byte (This register is 16bit long)

After reset REG:56H's value is &HAEC0. It should be changed to &HAEFF.

If you use adress &H11 instead &H10 (what you can read in TDS) than you can read/write the registers directly (instead sequentially, like in TDS).

How to read &H56 register directly? (and all ones)

I2C write &H11, 1, &H56 'WRITE to &H11 adress, 1 byte, REG adress

I2C read &H11, 2, (target HIGH byte), (target LOW byte) 'READ from &H11 adress, 2 bytes, HIGH byte, LOW byte

Maybe it works similarly in 5807FP also.

I hope it is useful for you :-)