Currently each peripheral implements part of the interrupt handling logic, such as checking for interrupt condition, and clearing the corresponding interrupt flag after the. This creates some code duplication, does not respect interrupt priority, and also allows multiple interrupt handler to run sequentially.
Section 7.7 of the datasheet describes how interrupts should work:
The list also determines the priority levels of the different interrupts. The lower the address the higher is the priority level. RESET has the highest priority, and next is INT0 – the External Interrupt Request 0.
When the AVR exits from an interrupt, it will always return to the main program and execute one more instruction before any pending interrupt is served.
In other words, RETI should disable interrupts for one CPU instruction.
Currently each peripheral implements part of the interrupt handling logic, such as checking for interrupt condition, and clearing the corresponding interrupt flag after the. This creates some code duplication, does not respect interrupt priority, and also allows multiple interrupt handler to run sequentially.
Section 7.7 of the datasheet describes how interrupts should work:
In other words,
RETI
should disable interrupts for one CPU instruction.