Open mingpepe opened 1 year ago
Seems like Core1 is not widely used - other than you, I think only one person asked about it to date.
Do you have any concrete use case for simulating Core1?
I want to emulate my code and core1
is part of it.
Indeed not many projects use core1
or just use it to do trivial task, but I think core1
is important if you care about performance.
It's ok not having a schedule for this because I am working in progress but it's not a trivial task and some details I do not understand. I will post what I have done and problems later, some suggestions may be helpful.
Got it.
We did some preparation at 29746d1e02ff04680809dde23981a351bdd7826c. I think the next step would be:
step()
, call executeInstruction on each of the cores. Also in reset()
, reset both cores.That's from the top of my head.
Regarding the popularity of this feature: I've opened it for voting back in August. I just checked the votes status, seems like nobody voted for it so far.
:smiling_face_with_tear:
Currently works fine for basic samples hello_multicore multicore_runner multicore_runner_queue
But still not working for interrupt handling multicore_fifo_irqs
Is any plan to do this?