Closed Turro75 closed 3 years ago
Sorry Uri, I don't know why github still remember the previous commits even if You already merged them. Can I ask You how I can avoid this annoying behavior?
The only relevant commit is b0b6093
Hi Valerio,
First of all, this is a great idea, thanks! I have some comments, I will leave a detailed review later today.
Now for your question, you can try to rebase your branch against the current master:
git add remote upstream https://github.com/wokwi/rp2040js
(only do it once, git will remember it for the feature)git fetch upstream
git rebase upstream/master
git push --force-with-lease
Also, it's a good practice to open a new branch per pull-request. Whenever you update the branch, the pull-request is also updated automatically
Hi Uri, I added an automatic fix of mismatched registers so gdbdiff can continue to run endless reporting every error but keeping the emulator synced with silicone.
I've seen that most errors are due to ldr loading from missing peripherals registers, to make gdbdiff even more helpful it could report the asm at pc memory and print out which memory address stored a wrong value or printing out the code for a test ready to be pasted in the test file.
About the main()
issue, here are the hex/elf files for reproducing it:
Running on silicone:
(gdb) monitor reset init
target halted due to debug-request, current mode: Thread
xPSR: 0xf1000000 pc: 0x000000ee msp: 0x20041f00
target halted due to debug-request, current mode: Thread
xPSR: 0xf1000000 pc: 0x000000ee msp: 0x20041f00
(gdb) break main
Breakpoint 1 at 0x10000342: file /home/uri/p/test-printf/test-printf.ino, line 2.
(gdb) c
Continuing.
Note: automatically using hardware breakpoints for read-only addresses.
target halted due to debug-request, current mode: Thread
xPSR: 0x01000000 pc: 0x00000178 msp: 0x20041f00
Thread 1 hit Breakpoint 1, main () at /home/uri/p/test-printf/test-printf.ino:2
2 printf("12 is %d\n", 12);
(gdb) info registers
r0 0x0 0
r1 0x10001cd9 268442841
r2 0x20002858 536881240
r3 0x1 1
r4 0x0 0
r5 0x0 0
r6 0x0 0
r7 0x0 0
r8 0x0 0
r9 0x0 0
r10 0x0 0
r11 0x0 0
r12 0x5 5
sp 0x2000ceb0 0x2000ceb0 <_main_stack+32744>
lr 0x100040a7 268452007
pc 0x10000342 0x10000342 <main()+2>
xPSR 0x61000000 1627389952
msp 0x2003ffb8 0x2003ffb8
psp 0x2000ceb0 0x2000ceb0 <_main_stack+32744>
primask 0x0 0
basepri 0x0 0
faultmask 0x0 0
control 0x2 2
Running in the emulator:
0x10000000 in ?? ()
A program is being debugged already.
Are you sure you want to change the file? (y or n) y
Reading symbols from test-printf.ino.elf...
(gdb) break main
Breakpoint 1 at 0x10000342: file /home/uri/p/test-printf/test-printf.ino, line 2.
(gdb) c
Continuing.
Breakpoint 1, main () at /home/uri/p/test-printf/test-printf.ino:2
2 printf("12 is %d\n", 12);
(gdb) info registers
r0 0x0 0
r1 0x10001cd9 268442841
r2 0x20002858 536881240
r3 0x1 1
r4 0x0 0
r5 0x0 0
r6 0x0 0
r7 0x0 0
r8 0x0 0
r9 0x0 0
r10 0x0 0
r11 0x0 0
r12 0xa 10
sp 0x2000ceb0 0x2000ceb0 <_main_stack+32744>
lr 0x100040a7 268452007
pc 0x10000342 0x10000342 <main()+2>
xPSR 0x61000000 1627389952
msp 0x2003ffb8 0x2003ffb8
psp 0x2000ceb0 0x2000ceb0 <_main_stack+32744>
primask 0x0 0
basepri 0x0 0
faultmask 0x0 0
control 0x2 2
(gdb)
difference:
Silicone - r12 0x5 5
Emulator - r12 0xa 10
Thanks! Anything else you want to change or can I merge this?
no I'm confident it is fine for now
Awesome, thanks!
Moved the information about the main()
difference with r12 to a new issue: #28
diff.txt testdiff.txt This is the output of the emulator and gdbdiff of the hex You shared above, the funny thing is that mbed os crashed. what I've seen are only errors due to unimplemented peripherals and mismatches from taken values. the asm seems working well for now.
Now I'm trying to debug the pico prior to main to see where r12 is set to 5, using watchpoints on pico is so slow....
Thanks!
The reason for Mbed OS crashing is probably the fact that we disabled the interrupts (writing 1 to PRIMASK). So it thinks we're inside an interrupt handler, and then if we try to call certain functions, it crashes.
One possible workaround would be to keep the interrupts enabled, but to write 0xffffffff to NVIC_ICER
(at 0xe000e180) after each instruction, so all interrupts will remain disabled even though PRIMASK is 1.
Another workaround will probably be to find memory address of the instruction that reads from PRIMASK in Mbed OS code, and change the result so it always reads 0 (and then doesn't think we are inside interrupt handler)
And maybe just removing the code that writes 1 to PRIMASK will also work ?
Also, let's move this discussion to #28
reworked a bit gdbdiff to produce less output:
Successfully compared 0 instructions Successfully compared 500 instructions Successfully compared 1000 instructions Successfully compared 1500 instructions Successfully compared 2000 instructions Successfully compared 2500 instructions Successfully compared 3000 instructions Successfully compared 3500 instructions Successfully compared 4000 instructions Successfully compared 4500 instructions Successfully compared 5000 instructions Mismatch register 3: emulator 0x0 != silicone 0x197 status register at failed instruction: Registers Emulator Silicone r0 0x00000000 0x00000000 r1 0x2000cd07 0x2000cd07 r2 0x40034000 0x40034000 r3 0x2000cd07 0x2000cd07 r4 0x00000000 0x00000000 r5 0x00000001 0x00000001 r6 0x2000cd2f 0x2000cd2f r7 0x100137d4 0x100137d4 r8 0x00000000 0x00000000 r9 0x00000000 0x00000000 r10 0x00000000 0x00000000 r11 0x00000000 0x00000000 r12 0x2000267d 0x2000267d sp 0x2000cd00 0x2000cd00 lr 0x10008fa5 0x10008fa5 pc 0x1000b746 0x1000b746 xPSR 0x61000000 0x61000000 Status register at current instruction: Registers Emulator Silicone r0 0x00000000 0x00000000 r1 0x2000cd07 0x2000cd07 r2 0x40034000 0x40034000 r3 0x00000000 0x00000197 r4 0x00000000 0x00000000 r5 0x00000001 0x00000001 r6 0x2000cd2f 0x2000cd2f r7 0x100137d4 0x100137d4 r8 0x00000000 0x00000000 r9 0x00000000 0x00000000 r10 0x00000000 0x00000000 r11 0x00000000 0x00000000 r12 0x2000267d 0x2000267d sp 0x2000cd00 0x2000cd00 lr 0x10008fa5 0x10008fa5 pc 0x1000b748 0x1000b748 xPSR 0x61000000 0x61000000