SLB9670 I/O Not Working for General Purpose MCU?

[tmisako]

Hi, could you please include more cues on how to get the SLB9670 working with SPI on a general-purpose MCU with wolfTPM? I have tried to implement a SLB9670 VQ2.0 with my MCU via SPI. I cannot reveal the MCU used (school rules, sorry). I understand that this problem seems platform-specific, but I believe it has significance with respect to the wolfTPM library GitHub repo as your documentation suggests that you support the SLB9670: So, I'm just wondering if there are any specific ways I should setup my IoCb specifically for SLB9670 use and if there is a best example of how to do this. Attached are the output of the logic analyzer for the MISO, MOSI, and reset lines:

SPI Config: 1MHz Hardware-controlled Chip Select (CS) CPOL = 0, CPHA = 0, most-significant bit first

/* IO Callback */
static int TPM2_IoCb(TPM2_CTX* ctx, const BYTE* txBuf, BYTE* rxBuf, UINT16 xferSz,
    void* userCtx)
{
    int ret = TPM_RC_FAILURE;
    unsigned long i;
    int64_t timeout = 250;
    uint8_t spi_ret;   
    taskENTER_CRITICAL();
    tpm_spi_send_recv(txBuf, rxBuf, xferSz, &spi_ret);
    taskEXIT_CRITICAL();
    ret = TPM_RC_SUCCESS;

    printf("TPM2_IoCb: Ret %d, Sz %d\n", ret, xferSz);
    TPM2_PrintBin(txBuf, xferSz);
    TPM2_PrintBin(rxBuf, xferSz);

    return ret;
}

The SPI seems to just repeat this same sequence: MOSI: 0x80, 0xD4, 0x00, 0x18 MISO: 0x00, 0x00, 0x00, 0x01 and it is never able to go beyond TPM2_TIS_WaitForStatus() in tpm2_tis.c when calling TPM2_SendCommand() which is within TPM2_Startup() which is in the wolfTPM2_Init().

[dgarske]

Hi tmisako,

I thought it might be helpful to include the verbose debug output to show you what each SPI operation should look like against the SLB9670:

./configure --enable-debug=verbose --disable-shared && make
./examples/wrap/wrap_test 

TPM2 Demo for Wrapper API's
TPM2_IoCb: Ret 0, Sz 5
    80 d4 00 00 00                                  | .....
    00 00 00 01 a1                                  | .....
TPM2_IoCb: Ret 0, Sz 5
    80 d4 00 00 00                                  | .....
    00 00 00 01 a1                                  | .....
TPM2_IoCb: Ret 0, Sz 8
    83 d4 00 14 00 00 00 00                         | ........
    00 00 00 01 97 06 00 30                         | .......0
TPM2_IoCb: Ret 0, Sz 8
    83 d4 0f 00 00 00 00 00                         | ........
    00 00 00 01 d1 15 1b 00                         | ........
TPM2_IoCb: Ret 0, Sz 5
    80 d4 0f 04 00                                  | .....
    00 00 00 01 10                                  | .....
TPM2: Caps 0x30000697, Did 0x001b, Vid 0x15d1, Rid 0x10 
Command: 12
    80 01 00 00 00 0c 00 00 01 44 00 00             | .........D..
TPM2_IoCb: Ret 0, Sz 5
    80 d4 00 18 00                                  | .....
    00 00 00 01 44                                  | ....D
TPM2_IoCb: Ret 0, Sz 6
    81 d4 00 19 00 00                               | ......
    00 00 00 01 ff 00                               | ......
TPM2_IoCb: Ret 0, Sz 16
    0b d4 00 24 80 01 00 00 00 0c 00 00 01 44 00 00 | ...$.........D..
    00 00 00 01 00 00 00 00 00 00 00 00 00 00 00 00 | ................
TPM2_IoCb: Ret 0, Sz 5
    80 d4 00 18 00                                  | .....
    00 00 00 01 0c                                  | .....
TPM2_IoCb: Ret 0, Sz 5
    80 d4 00 18 00                                  | .....
    00 00 00 01 84                                  | .....
TPM2_IoCb: Ret 0, Sz 5
    00 d4 00 18 20                                  | .... 
    00 00 00 01 00                                  | .....
TPM2_IoCb: Ret 0, Sz 5
    80 d4 00 18 00                                  | .....
    00 00 00 01 84                                  | .....
TPM2_IoCb: Ret 0, Sz 5
    80 d4 00 18 00                                  | .....
    00 00 00 01 84                                  | .....
TPM2_IoCb: Ret 0, Sz 5
    80 d4 00 18 00                                  | .....
    00 00 00 01 84                                  | .....
TPM2_IoCb: Ret 0, Sz 5
    80 d4 00 18 00                                  | .....
    00 00 00 01 94                                  | .....
TPM2_IoCb: Ret 0, Sz 6
    81 d4 00 19 00 00                               | ......
    00 00 00 01 0a 00                               | ......
TPM2_IoCb: Ret 0, Sz 14
    89 d4 00 24 00 00 00 00 00 00 00 00 00 00       | ...$..........
    00 00 00 01 80 01 00 00 00 0a 00 00 01 00       | ..............
Response: 10
    80 01 00 00 00 0a 00 00 01 00                   | ..........
TPM2_IoCb: Ret 0, Sz 5
    00 d4 00 18 40                                  | ....@
    00 00 00 01 00                                  | .....
TPM2_Startup pass

An issue similar to this came up the other day and it had to do with the TPM2_HEADER structure, which currently requires packing. You can see a fix I pushed here https://github.com/wolfSSL/wolfTPM/pull/42, which will double check the struct size is 10 bytes. I plan on a refactor to eliminate the packed struct in the near future for better compatibility between compilers.

Let me know if that helps.

Thanks, David Garske, wolfSSL

[tmisako]

Hi David, Thanks for providing the sample I/O for the SLB9670 SPI. That is actually a huge help to see as I can confirm that my I/O looks very similar (MOSI is perfect, but the MISO is slightly off)! Could you indicate the IoCb code and the SPI configuration that you use for your SLB9670? Thanks!

[dgarske]

Hi tmisako,

The SPI code I am using if for Linux SPI on a Raspberry Pi. All our HAL IO callback examples are located here: https://github.com/wolfSSL/wolfTPM/blob/master/examples/tpm_io.c

The specific callback being used for the above SLB9670 output is here: https://github.com/wolfSSL/wolfTPM/blob/master/examples/tpm_io.c#L177 And the WOLFTPM_CHECK_WAIT_STATE section is not defined. The SPI wait states are not used by the SLB9670 (they are used by the ST33).

I've reviewed your SPI callback code above and it looks good, but I'd have to review your tpm_spi_send_recv function to know for sure. If you aren't comfortable posting here on GitHub you can email it to us directly at support@wolfssl.com and reference this issue.

Thanks, David Garske, wolfSSL

[tmisako]

Hi David, I appear to have figured out the implementation error was a defect in the SLB9670 breakout board I purchased (a voltage regulator was not working so instead of 3.3V, I was getting 5V to the SLB9670, hence the SPI RX errors). But your notes on the WAIT_STATE and the proper callback to use for the SLB9670 were instrumental for helping me to debug my issues!!! Thank You!!!!! Regards, tmisako