IM MODE 0,1 and 2 (and CTC)

[rampa069]

Hi. I am having some trouble (sure ununderstanding at my side) implementing a Z80 RC2014 on FPGA

At the moment, i have implemented:

internal Z80 internal 512K RAM. internal 512K ROM Z2 memory paging (ports 0x78,0x79,0x7a,0x7b,0x7c) internal SD drive (port 0x69) (reading real SD cards or disk images) 2 x ACIA 6850B (ports 0x80 and 0x40) AY-3-8910 VT105 terminal connected to the first ACIA (Can change console to secondary with the boot switches at OSD)

And also the real RC2014 bus. Anything (but the Z80) can be internal or external.

In IM0 everything is working OK. In IM1 the machine boots, but stops after the boot prompt (i think until the last ACIA interrupt) in IM2 The machine locks after the RomWBW banner.

The CTC chip is detected and i can program this from monitor. but how it is wired?

system clock to triger0 -> to0 to triger1 ?

is the ROM programing the CTC at boot?

Thanks for your time.

BTW, the rom (if you want to check parameters) configuration is here

[wwarthen]

It certainly sounds like an interrupt issue, but very confusing.

RomWBW will program the CTC if it is detected, but will do so differently depending on the interrupt mode that is being used.

With INTMODE=0 or INTMODE=1, the CTC will be initialized to a default state, but will not be programmed to generate timer interrupts. This is because it basically needs interrupt mode 2 for that. With INTMODE=2, the CTC will be programmed to generate timer interrupts. The output of channel 2 is assumed to be sent to channel 3 trigger. Channel 3 will be programmed to generate the periodic interrupt. This configuration is just the default from cfg_rcz80.asm. You can override the settings in your RCZ80_fpga.asm file to use the channels as you like.

Does this help? If not, could you provide the boot messages from an interrupt mode1 and interrupt mode 2 boot?

Thanks,

Wayne

[rampa069]

Thank you very much. The problem at boot was the acia implementation sending the irq in positive logic 🤔.

Have chained the channel 2 and 3 of CTC and it is sending interrupts. Only a doubt. What clock is tied to trigger2? The cpu osc? In the cfg appears a ±900khz osc but looking at some rc2014 schematics can't see this oscillator.

[wwarthen]

OK, yes, inverted logic in the ACIA would be a problem. Good catch on that.

Assuming the default CTC configuration used in the RCBus systems, it works like this:

Channel 2 is configured for TIMER mode meaning it will take it's input from the clock signal on the bus/cpu. The trigger pin is unused for this channel. The channel is configured with a pre-scaler of 16 and a timer constant of 256 (actual value for this is zero). So, channel 2 will divide the clock signal by a total of 4,096.

Channel 3 is configured for COUNTER mode which means it uses the trigger pin for input. The trigger is assumed to be connected to the output of channel 2. There is no pre-scaler in the case of COUNTER mode. The channel is programmed with a timer constant of 36, so channel 3 will divide it's trigger input by 36. Additionally, channel 3 is configured to generate an interrupt.

Combining the effects of both channels, you get 7,372,800 / 16 / 256 / 36 = 50. So this configuration generates recurring interrupts at the rate of 50 Hz.

Thanks,

Wayne

[rampa069]

Everything working now... I was confused thinking that the triger was used :(

Thanks very much....

[wwarthen]

Everything working now... I was confused thinking that the triger was used :(

Glad all is working now!

-Wayne