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xiph / LPCNet

Efficient neural speech synthesis
BSD 3-Clause "New" or "Revised" License
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P192 speed test in ARM A35 chip #200

Closed wizardk closed 1 year ago

wizardk commented 1 year ago

chip : 1.3GHz ARM A35 code : lpcnet_efficiency model : P192 synthetic speech length : 3600ms synthesis time : 6700ms

The real-time rate of this test is 1.86. The real-time rate on A53 mentioned in the paper is 0.92.

Why is there such a big difference?

jmvalin commented 1 year ago

Make sure you're compiling as 64-bit ARMv8 (ideally with -O3 or even -Ofast). Also, where you using the version cited in the paper?

wizardk commented 1 year ago

@jmvalin , I used -Ofast and the model file is P192.

jmvalin commented 1 year ago

It's possible your CPU/cache/memory is just slower than the specific A53 (RPi 3B+) I was using for testing.

wizardk commented 1 year ago

@jmvalin Will you consider using multi-core for acceleration in the future?

jmvalin commented 1 year ago

Very unlikely. LPCNet would be very hard to parallelize across multiple cores because of its autoregressive sample-wise architecture (which is also what makes it fast in the first place). Even if it could be done, it would only benefit a few platforms that have slow cores that can't run in real-time, but not so slow that multi-core would still be too slow.

wizardk commented 1 year ago

I see. Thank you.