Closed keithm-xmos closed 1 year ago
From @lkindrat-xmos: The pad fusing can currently produce paddings that are larger than the kernel size. This should happen very rarely (if ever), but it can be a source of bugs regardless.
From @astewart-xmos: We have two versions of the assembly that produces a row of output pixels, one that allows padding, and one that doesn't. Unfortunately, we can currently only use the one that doesn't support padding if there's no padding anywhere in the image (so it can't be used on the interior of a big convolution if there's padding at the edges)
This will affect the depthwise convolution kernel and potential others. Consider if conv2d 1x1 should also have padding.