Fix test_i2s_basic_master and test_basic_master_external_clock tests so they run for 192KHz, 96KHz and 48KHz for both 32bits and 16bits for the smoke test and 192, 96, 48, 176.4, 88.2 and 44.1KHz for 32 and 16bits for the nightly test.
Note that the mclk frequency is set such that the mclk_bclk_ratio is atleast 2 for the worst case (192KHz). I could not get the test to pass reliably if testing with mclk_bclk_ratio set to 1. Sometimes, the bclk clock block would start with a falling edge instead of a rising edge, causing the LR clk to start before the bclk.
With mclk_bclk_ratio of 2 or more, I couldn't recreate this issue.
https://xmosjira.atlassian.net/browse/AP-403
Changes in this PR:
pytest lib_i2s/test_i2s_basic_master.py pytest lib_i2s/test_basic_master_external_clock.py
pytest lib_i2s/test_i2s_basic_master.py --nightly pytest lib_i2s/test_basic_master_external_clock.py --nightly
Note that the mclk frequency is set such that the mclk_bclk_ratio is atleast 2 for the worst case (192KHz). I could not get the test to pass reliably if testing with mclk_bclk_ratio set to 1. Sometimes, the bclk clock block would start with a falling edge instead of a rising edge, causing the LR clk to start before the bclk. With mclk_bclk_ratio of 2 or more, I couldn't recreate this issue.