Open ed-xmos opened 8 years ago
XS2 devices have differing timings on different banks. In particular RGMII ports show different timings and should not be part of the port map for SDRAM. This should be documented in the guide.
This document goes a long way towards addressing this issue:
https://www.xmos.com/download/private/I-O-timings-for-xCORE200%281.0%29.pdf
XS2 devices have differing timings on different banks. In particular RGMII ports show different timings and should not be part of the port map for SDRAM. This should be documented in the guide.