Extend operating range

[mbanth]

We use the SW PLL to generate an internal clock signal that matches an external clock signal which varies from its nominal rate. The external clock signal may be explicit of implicit within a transport protocol.

One such signal is the SOF rate provided over USB. With USB Audio adaptive synchronisation, a USB device has to alter its transmission clock to match the USB host's data rate. Section 7.1.11 of the USB 2.0 specification states that a USB high-speed capable device has a required data rate accuracy when transmissting of +/- 500 ppm.

According to @ed-xmos, the current SW PLL implementation can correct signals with a maximum variation of around 70 or 80 ppm using a step size of 0.5 ppm. It uses a lookup table in a PI control loop to provide numerator and denominator values to the hardware application PLL. The lookup table currently occupies 600 B.

Extending that table to cover a range of 500 ppm with 0.5 ppm step size will require ~ 4 KB of memory, which may be more than a device can make available. Other options (a non-exclusive list) inlcude:

• Expanding the table range but reducing the step size to 1 ppm,
• Using two different tables, one for coarse control and another one for fine control,
• Using a lookup table whose step size increases with the distance from the nominal value, or
• Switching to using a formula in place of a lookup table.

This issue covers:

• [x] Investigation of these (and possibly other) options,
• [x] Selecting an option to implement,
• [x] Implementing the selected option,
• [x] Testing the implementation, and
• [x] Adding any necessary documentation about the change.

[mbanth]

@ed-xmos, please provide a Story Point value for this issue. Thanks.

[ed-xmos]

Note it makes sense to do https://github.com/xmos/lib_sw_pll/issues/21 first since this is the generic guide of how to trade off range vs noise

[ed-xmos]

@mbanth, Joe says that the PPM range for Asynch is actually 1000PPM (from the UAC2 spec). I think the 500PPM may actually refer to the wire speed range.

[mbanth]

@mbanth, Joe says that the PPM range for Asynch is actually 1000PPM (from the UAC2 spec).

@XMOS-JoeG has raised an interesting point. The note appears in UAC2. The +/- 500 PPM specification appears in USB 2.0.

[XMOS-JoeG]

There are a few errors in the comments here, just trying to clear things up. There are 3 synchronisation types as shown below:

For synchronous mode, the application clock is derived from the SOF signal and that is tied to the data signalling rate. Data signalling rate limit is +-500ppm for high speed devices and +-2500ppm for full speed devices.

For adaptive mode, the application clock is derived from the data rate (independent of signalling rate). The audio class 2 spec specifies the endpoint must tolerate +-1000ppm as mentioned (only for devices which declare they support defined sampling rates 44.1/48 etc).

For asynchronous mode, the application clock is defined by the device so as far as I can see can be any tolerance but the driver will likely have its own limits.

[ed-xmos]

The range has been extended to +-1000PPM and added here https://github.com/xmos/sw_xvf3800/pull/671

Documentation TBD

[ed-xmos]

@tomblackie-xmos is adding this to the documentation so marking issue as closed.